cpu: Fix indirect branch history updates
authorSrikant Bharadwaj <srikant.bharadwaj@amd.com>
Tue, 26 Feb 2019 19:44:40 +0000 (14:44 -0500)
committerSrikant Bharadwaj <srikant.bharadwaj@amd.com>
Tue, 26 Feb 2019 19:52:43 +0000 (19:52 +0000)
Recent changes to indirect branch predictor interface accesses
non-existent buffers even when indirect predictor is not in use.

Change-Id: I0df9ac4d5f6f3cb63e4d1bd36949c27f7611eef6
Reviewed-on: https://gem5-review.googlesource.com/c/16668
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

src/cpu/pred/bpred_unit.cc

index a768cc19eaccc8f1163822354d4351545476dbcf..2bfd901400f6baa46da4a889f1dd3a2f549c1409 100644 (file)
@@ -371,7 +371,9 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)
 
         // This call should delete the bpHistory.
         squash(tid, pred_hist.front().bpHistory);
-        iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory);
+        if (useIndirect) {
+            iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory);
+        }
 
         DPRINTF(Branch, "[tid:%i]: Removing history for [sn:%i] "
                 "PC %s.\n", tid, pred_hist.front().seqNum,
@@ -452,8 +454,10 @@ BPredUnit::squash(const InstSeqNum &squashed_sn,
                pred_hist.front().bpHistory, true, pred_hist.front().inst,
                corrTarget.instAddr());
 
-        iPred.changeDirectionPrediction(tid, pred_hist.front().indirectHistory,
-                                        actually_taken);
+        if (useIndirect) {
+            iPred.changeDirectionPrediction(tid,
+                pred_hist.front().indirectHistory, actually_taken);
+        }
 
         if (actually_taken) {
             if (hist_it->wasReturn && !hist_it->usedRAS) {