+2005-04-01 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-i386.c (md_apply_fix3): Also handle BFD_RELOC_X86_64_32S.
+ (tc_gen_reloc): Handle BFD_RELOC_X86_64_32S in the default case.
+
2005-03-30 Julian Brown <julian@codesourcery.com>
* config/tc-arm.c (arm_adjust_symtab): Rename
break;
case BFD_RELOC_32:
+ case BFD_RELOC_X86_64_32S:
fixP->fx_r_type = BFD_RELOC_32_PCREL;
break;
case BFD_RELOC_16:
case BFD_RELOC_386_TLS_GOTIE:
case BFD_RELOC_386_TLS_LE_32:
case BFD_RELOC_386_TLS_LE:
- case BFD_RELOC_X86_64_32S:
case BFD_RELOC_X86_64_TLSGD:
case BFD_RELOC_X86_64_TLSLD:
case BFD_RELOC_X86_64_DTPOFF32:
+2005-04-01 Jan Beulich <jbeulich@novell.com>
+ * gas/i386/x86-64-pcrel.[sd]: New.
+ * gas/i386/i386.exp: Run new test.
+
2005-03-30 Julian Brown <julian@codesourcery.com>
* gas/arm/mapping.d: Update expected output due to mapping symbols
run_dump_test "x86_64"
run_dump_test "x86-64-addr32"
run_dump_test "x86-64-opcode"
+ run_dump_test "x86-64-pcrel"
run_dump_test "x86-64-rip"
run_list_test "x86-64-inval" "-al"
run_list_test "x86-64-segment" "-al"
--- /dev/null
+#objdump: -drw
+#name: x86-64 pcrel
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+000 <_start>:
+[ ]*[0-9a-f]+:[ ]+b0 00[ ]+movb?[ ]+\$(0x)?0,%al[ ]*[0-9a-f]+:[ ]+R_X86_64_PC8[ ]+xtrn\+(0x)?1
+[ ]*[0-9a-f]+:[ ]+66 b8 00 00[ ]+movw?[ ]+\$(0x)?0,%ax[ ]*[0-9a-f]+:[ ]+R_X86_64_PC16[ ]+xtrn\+(0x)?2
+[ ]*[0-9a-f]+:[ ]+b8 00 00 00 00[ ]+movl?[ ]+\$(0x)?0,%eax[ ]*[0-9a-f]+:[ ]+R_X86_64_PC32[ ]+xtrn\+(0x)?1
+[ ]*[0-9a-f]+:[ ]+48 c7 c0 00 00 00 00[ ]+movq?[ ]+\$(0x)?0,%rax[ ]*[0-9a-f]+:[ ]+R_X86_64_PC32[ ]+xtrn\+(0x)?3
+#pass
--- /dev/null
+ .text
+_start:
+ movb $(xtrn - .), %al
+ movw $(xtrn - .), %ax
+ movl $(xtrn - .), %eax
+ movq $(xtrn - .), %rax
+
+ .p2align 4,0