case TYPE_FPLOAD:
/* This cost 3 cycles, not 2 as the md says for the
700 and 7100. Note scaling of cost for 7100. */
- return cost + (pa_cpu_attr == PROCESSOR_700) ? 1 : 2;
+ return cost + (pa_cpu == PROCESSOR_700) ? 1 : 2;
case TYPE_FPALU:
case TYPE_FPMULSGL:
case TYPE_FPSQRTDBL:
/* In these important cases, we save one cycle compared to
when flop instruction feed each other. */
- return cost - (pa_cpu_attr == PROCESSOR_700) ? 1 : 2;
+ return cost - (pa_cpu == PROCESSOR_700) ? 1 : 2;
default:
return cost;
preceding arithmetic operation has finished if
the target of the fpload is any of the sources
(or destination) of the arithmetic operation. */
- return cost - (pa_cpu_attr == PROCESSOR_700) ? 1 : 2;
+ return cost - (pa_cpu == PROCESSOR_700) ? 1 : 2;
default:
return 0;
preceding divide or sqrt operation has finished if
the target of the ALU flop is any of the sources
(or destination) of the divide or sqrt operation. */
- return cost - (pa_cpu_attr == PROCESSOR_700) ? 2 : 4;
+ return cost - (pa_cpu == PROCESSOR_700) ? 2 : 4;
default:
return 0;
preceding arithmetic operation has finished if
the target of the fpload is the destination of the
arithmetic operation. */
- return cost - (pa_cpu_attr == PROCESSOR_700) ? 1 : 2;
+ return cost - (pa_cpu == PROCESSOR_700) ? 1 : 2;
default:
return 0;
preceding divide or sqrt operation has finished if
the target of the ALU flop is also the target of
of the divide or sqrt operation. */
- return cost - (pa_cpu_attr == PROCESSOR_700) ? 2 : 4;
+ return cost - (pa_cpu == PROCESSOR_700) ? 2 : 4;
default:
return 0;