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diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 4f02a47eafef97c1b96714962489bf67ad528347..f59c0c622e675f80e6ffeaf04a32fd0d0e399a9a 100644 (file)
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -269,8 +269,15 @@ struct SynthXilinxPass : public Pass
                        Pass::call(design, "dff2dffe");
 
                        if (!nosrl) {
+                               // shregmap operates on bit-level flops, not word-level,
+                               //   so break those down here
                                Pass::call(design, "simplemap t:$dff t:$dffe");
+                               // shregmap -tech xilinx can cope with $shiftx and $mux
+                               //   cells for identifiying variable-length shift registers,
+                               //   so attempt to convert $pmux-es to the former
                                Pass::call(design, "pmux2shiftx");
+                               // pmux2shiftx can leave behind a $pmux with a single entry
+                               //   -- need this to clean that up
                                Pass::call(design, "opt_expr -mux_undef");
                                Pass::call(design, "shregmap -tech xilinx -minlen 3");
                        }