ir3: Handle gl_FragStencilRefARB

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 2a5db029872311b53fa03ac8cfe1df1b67343ed8..acfe4341ccd99fa528242c63bdeadb43c798756f 100644 (file)
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -3209,6 +3209,9 @@ setup_output(struct ir3_context *ctx, nir_variable *out)
                case FRAG_RESULT_SAMPLE_MASK:
                        so->writes_smask = true;
                        break;
+               case FRAG_RESULT_STENCIL:
+                       so->writes_stencilref = true;
+                       break;
                default:
                        slot += out->data.index; /* For dual-src blend */
                        if (slot >= FRAG_RESULT_DATA0)

diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index f581084711204238f0581f3f27a3113a9bf1305b..f5a73bb2e005d0b5bda0aaf81fa9ebc2df480725 100644 (file)
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -564,7 +564,7 @@ struct ir3_shader_variant {
                uint8_t regid;
                bool    half : 1;
        } outputs[32 + 2];  /* +POSITION +PSIZE */
-       bool writes_pos, writes_smask, writes_psize;
+       bool writes_pos, writes_smask, writes_psize, writes_stencilref;
 
        /* Size in dwords of all outputs for VS, size of entire patch for HS. */
        uint32_t output_size;