radv: enable nir component packing
authorTimothy Arceri <tarceri@itsqueeze.com>
Wed, 18 Oct 2017 02:48:41 +0000 (13:48 +1100)
committerTimothy Arceri <tarceri@itsqueeze.com>
Sun, 3 Dec 2017 22:10:30 +0000 (09:10 +1100)
SaschaWillems Vulkan demo tessellation:

~4000fps -> ~4600fps

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_pipeline.c

index fcbb5804f5e9df5a16b7153e2f4b65371755ee79..6490b04863070f8005911513468be77d4b7095fb 100644 (file)
@@ -1828,6 +1828,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
                last = i;
        }
 
+       int prev = -1;
        for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) {
                const VkPipelineShaderStageCreateInfo *stage = pStages[i];
 
@@ -1858,6 +1859,11 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
                        nir_lower_io_to_scalar_early(nir[i], mask);
                        radv_optimize_nir(nir[i]);
                }
+
+               if (prev != -1) {
+                       nir_compact_varyings(nir[prev], nir[i], true);
+               }
+               prev = i;
        }
 
        if (nir[MESA_SHADER_TESS_CTRL]) {