The configuration register is a vital register in the SMMU, and using
enum masks will make the code more readable/understandable
Change-Id: Ia117db56c457fe876ae38be391c386e502f34384
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Michiel Van Tol <michiel.vantol@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19632
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
uint64_t _pad[3];
};
+enum {
+ CR0_SMMUEN_MASK = 0x1,
+ CR0_PRIQEN_MASK = 0x2,
+ CR0_EVENTQEN_MASK = 0x4,
+ CR0_CMDQEN_MASK = 0x8,
+ CR0_ATSCHK_MASK = 0x10,
+ CR0_VMW_MASK = 0x1C0,
+};
+
enum SMMUCommandType {
CMD_PRF_CONFIG = 0x1000,
CMD_PRF_ADDR = 0x1001,
recvTick = curTick();
-
- if (!(smmu.regs.cr0 & 0x1)) {
+ if (!(smmu.regs.cr0 & CR0_SMMUEN_MASK)) {
// SMMU disabled
doDelay(yield, Cycles(1));
completeTransaction(yield, bypass(request.addr));