/* the number of CS dwords for flushing and drawing */
#define R600_MAX_FLUSH_CS_DWORDS 16
-#define R600_MAX_DRAW_CS_DWORDS 49
+#define R600_MAX_DRAW_CS_DWORDS 52
#define R600_TRACE_CS_DWORDS 7
#define R600_MAX_USER_CONST_BUFFERS 13
(info.count_from_stream_output ? S_0287F0_USE_OPAQUE(1) : 0);
}
+ /* SMX returns CONTEXT_DONE too early workaround */
+ if (rctx->b.family == CHIP_R600 ||
+ rctx->b.family == CHIP_RV610 ||
+ rctx->b.family == CHIP_RV630 ||
+ rctx->b.family == CHIP_RV635) {
+ /* if we have gs shader or streamout
+ we need to do a wait idle after every draw */
+ if (rctx->gs_shader || rctx->b.streamout.streamout_enabled) {
+ radeon_set_config_reg(cs, R_008040_WAIT_UNTIL, S_008040_WAIT_3D_IDLE(1));
+ }
+ }
+
/* ES ring rolling over at EOP - workaround */
if (rctx->b.chip_class == R600) {
cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0);