Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
if rst = '1' then
wb_out.ack <= '0';
wb_out.stall <= '0';
- wb_stash.cyc <= '0';
- wb_stash.stb <= '0';
- wb_stash.sel <= (others => '0');
- wb_stash.we <= '0';
+ wb_stash.cyc <= '0';
+ wb_stash.stb <= '0';
+ wb_stash.sel <= (others => '0');
+ wb_stash.we <= '0';
else
-- Latch wb responses as well for 1 cycle. Stall is updated
-- below
auto_sync: process(clk)
begin
if rising_edge(clk) then
- if rst = '1' then
+ if rst = '1' then
auto_last_addr <= (others => '0');
- auto_state <= AUTO_BOOT;
- else
+ auto_state <= AUTO_BOOT;
+ else
auto_state <= auto_next;
auto_cnt <= auto_cnt_next;
auto_data <= auto_data_next;
if auto_latch_adr = '1' then
auto_last_addr <= auto_lad_next;
end if;
- end if;
+ end if;
end if;
end process;