- functions needed for simulator
- Shared 10% with [[mnolan]]
- <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
- - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
- - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
- <https://bugs.libre-soc.org/show_bug.cgi?id=346> test core to regfiles
- - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
- - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
- - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
- - <https://bugs.libre-soc.org/show_bug.cgi?id=323> CR proof
- <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
- <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
- <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
- <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
- <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
- <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
- - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
- <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
- <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
- <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
## Completed but not yet submitted:
- <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=323> CR proof
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
## Submitted for NLNet RFP