gas/
authorDaniel Jacobowitz <drow@false.org>
Wed, 13 Jan 2010 19:01:10 +0000 (19:01 +0000)
committerDaniel Jacobowitz <drow@false.org>
Wed, 13 Jan 2010 19:01:10 +0000 (19:01 +0000)
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.

gas/testsuite/
* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
Thumb-2.

ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
-mcpu=cortex-a8.

gas/ChangeLog
gas/config/tc-arm.c
gas/testsuite/ChangeLog
gas/testsuite/gas/arm/relax_branch_align.d
gas/testsuite/gas/arm/thumb-nop.d [new file with mode: 0644]
gas/testsuite/gas/arm/thumb-nop.s [new file with mode: 0644]
gas/testsuite/gas/arm/vfp1_t2.d
gas/testsuite/gas/arm/vfp1xD_t2.d
ld/testsuite/ChangeLog
ld/testsuite/ld-arm/arm-elf.exp

index f899ae98e57869cc05190dd046479332a078e3ba..8ae07df428eba1b956ceab4603e1ecce920d7878 100644 (file)
@@ -1,3 +1,7 @@
+2010-01-13  Daniel Jacobowitz  <dan@codesourcery.com>
+
+       * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
+
 2010-01-13  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-h8300.c (h8300_elf_section): New function - issue a
index b0184a5c80ab17f1d980b03065c9e837c92eaeba..d5a0ec4b12b4efc50859ea0e0d22386f8b61bf5b 100644 (file)
@@ -10623,7 +10623,7 @@ do_t_nop (void)
        {
          /* PR9722: Check for Thumb2 availability before
             generating a thumb2 nop instruction.  */
-         if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
+         if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6t2))
            {
              inst.instruction = THUMB_OP16 (inst.instruction);
              inst.instruction |= inst.operands[0].imm << 4;
index 2fafd115df95d671565629d48f652a72d3490ed6..64d3cc777411ec281292ee2a74862fd9ad32219d 100644 (file)
@@ -1,3 +1,10 @@
+2010-01-13  Daniel Jacobowitz  <dan@codesourcery.com>
+
+       * gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
+       * gas/arm/relax_branch_align.d: Expect a default NOP instruction.
+       * gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
+       Thumb-2.
+
 2010-01-13  Nick Clifton  <nickc@redhat.com>
 
        * gas/elf/section0.d: Skip this test for the h8300.
index e23b0951584d0342f975412b0c6f69f0e52fbd60..e19857a5876973e88297580ed1366fe2910c2460 100644 (file)
@@ -4,10 +4,10 @@
 .*: +file format .*arm.*
 
 Disassembly of section .text:
-0+000 <[^>]+> bf00             nop
+0+000 <[^>]+> 46c0             nop                     ; \(mov r8, r8\)
 0+002 <[^>]+> f000 8080        beq.w   0+106 <[^>]*>
-0+006 <[^>]+> bf00             nop
+0+006 <[^>]+> 46c0             nop                     ; \(mov r8, r8\)
 #...
-0+100 <[^>]+> bf00             nop
+0+100 <[^>]+> 46c0             nop                     ; \(mov r8, r8\)
 0+102 <[^>]+> f47f af80        bne.w   0+006 <[^>]*>
-0+106 <[^>]+> bf00             nop
+0+106 <[^>]+> 46c0             nop                     ; \(mov r8, r8\)
diff --git a/gas/testsuite/gas/arm/thumb-nop.d b/gas/testsuite/gas/arm/thumb-nop.d
new file mode 100644 (file)
index 0000000..648ed98
--- /dev/null
@@ -0,0 +1,11 @@
+# name: Thumb NOP
+# objdump: -dr --prefix-addresses --show-raw-insn
+#
+# Both explicit nop and padding should not use Thumb-2 NOP for the
+# default CPU.
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+0+000 <[^>]+> 46c0             nop                     ; \(mov r8, r8\)
+0+002 <[^>]+> 46c0             nop                     ; \(mov r8, r8\)
diff --git a/gas/testsuite/gas/arm/thumb-nop.s b/gas/testsuite/gas/arm/thumb-nop.s
new file mode 100644 (file)
index 0000000..55b7b6c
--- /dev/null
@@ -0,0 +1,5 @@
+       .text
+       .code 16
+       .p2align 2
+.foo:  
+       nop
index 2ff52fdecd742c27eccc5cccf8afb89aed2c1cb7..757bf103231644e6212a826811053ffff02d6581 100644 (file)
@@ -1,6 +1,6 @@
 #objdump: -dr --prefix-addresses --show-raw-insn
 #name: Thumb-2 VFP Double-precision instructions
-#as: -mfpu=vfp
+#as: -mfpu=vfp -mcpu=arm1156t2f-s
 
 # Test the ARM VFP Double Precision instructions
 
index 4cbadec453f12d1298b686c15b049f29eeef6ab0..7dd5030f28d6515d9ed2cbe3e11c5ab66be4167d 100644 (file)
@@ -1,6 +1,6 @@
 #objdump: -dr --prefix-addresses --show-raw-insn
 #name: Thumb-2 VFP Single-precision instructions
-#as: -mfpu=vfpxd
+#as: -mfpu=vfpxd -mcpu=arm1156t2f-s
 
 # Test the ARM VFP Single Precision instructions
 
index dbd6fc143f30a90c5143e069fbd94730d0a941de..7fda06e759075ac4dadb011b4a68356e289072fe 100644 (file)
@@ -1,3 +1,8 @@
+2010-01-13  Daniel Jacobowitz  <dan@codesourcery.com>
+
+       * ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
+       -mcpu=cortex-a8.
+
 2010-01-13  Nick Clifton  <nickc@redhat.com>
 
        * ld-scrips/sort.exp: Skip these tests when the target is the
index ce8e9ee87fe57fffa7ea8bfc9a84b0b96ee0d80d..050471d6e08de1c3f46572083baef72c2448529f 100644 (file)
@@ -207,11 +207,13 @@ set armelftests {
      {{objdump -dr cortex-a8-fix-blx-rel-thumb.d}}
      "cortex-a8-fix-blx-rel-thumb"}
     {"Cortex-A8 erratum fix, relocate bl.w and far call"
-     "-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004  --defsym far_fn=0x7fff0000 --defsym _start=0" "-EL" {cortex-a8-far-1.s cortex-a8-far-2.s}
+     "-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004  --defsym far_fn=0x7fff0000 --defsym _start=0"
+     "-EL -mcpu=cortex-a8" {cortex-a8-far-1.s cortex-a8-far-2.s}
      {{objdump -dr cortex-a8-far.d}}
      "cortex-a8-far"}
     {"Cortex-A8 erratum fix, headers"
-     "-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t" "-EL" {cortex-a8-fix-hdr.s}
+     "-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t"
+     "-EL -mcpu=cortex-a8" {cortex-a8-fix-hdr.s}
      {{objdump -dr cortex-a8-fix-hdr.d}}
      "cortex-a8-fix-hdr"}
     {"Unwinding and -gc-sections" "-gc-sections" "" {gc-unwind.s}