* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
gas/testsuite/
* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
Thumb-2.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
-mcpu=cortex-a8.
+2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
+
2010-01-13 Nick Clifton <nickc@redhat.com>
* config/tc-h8300.c (h8300_elf_section): New function - issue a
{
/* PR9722: Check for Thumb2 availability before
generating a thumb2 nop instruction. */
- if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
+ if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6t2))
{
inst.instruction = THUMB_OP16 (inst.instruction);
inst.instruction |= inst.operands[0].imm << 4;
+2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
+ * gas/arm/relax_branch_align.d: Expect a default NOP instruction.
+ * gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
+ Thumb-2.
+
2010-01-13 Nick Clifton <nickc@redhat.com>
* gas/elf/section0.d: Skip this test for the h8300.
.*: +file format .*arm.*
Disassembly of section .text:
-0+000 <[^>]+> bf00 nop
+0+000 <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+002 <[^>]+> f000 8080 beq.w 0+106 <[^>]*>
-0+006 <[^>]+> bf00 nop
+0+006 <[^>]+> 46c0 nop ; \(mov r8, r8\)
#...
-0+100 <[^>]+> bf00 nop
+0+100 <[^>]+> 46c0 nop ; \(mov r8, r8\)
0+102 <[^>]+> f47f af80 bne.w 0+006 <[^>]*>
-0+106 <[^>]+> bf00 nop
+0+106 <[^>]+> 46c0 nop ; \(mov r8, r8\)
--- /dev/null
+# name: Thumb NOP
+# objdump: -dr --prefix-addresses --show-raw-insn
+#
+# Both explicit nop and padding should not use Thumb-2 NOP for the
+# default CPU.
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+0+000 <[^>]+> 46c0 nop ; \(mov r8, r8\)
+0+002 <[^>]+> 46c0 nop ; \(mov r8, r8\)
--- /dev/null
+ .text
+ .code 16
+ .p2align 2
+.foo:
+ nop
#objdump: -dr --prefix-addresses --show-raw-insn
#name: Thumb-2 VFP Double-precision instructions
-#as: -mfpu=vfp
+#as: -mfpu=vfp -mcpu=arm1156t2f-s
# Test the ARM VFP Double Precision instructions
#objdump: -dr --prefix-addresses --show-raw-insn
#name: Thumb-2 VFP Single-precision instructions
-#as: -mfpu=vfpxd
+#as: -mfpu=vfpxd -mcpu=arm1156t2f-s
# Test the ARM VFP Single Precision instructions
+2010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
+ -mcpu=cortex-a8.
+
2010-01-13 Nick Clifton <nickc@redhat.com>
* ld-scrips/sort.exp: Skip these tests when the target is the
{{objdump -dr cortex-a8-fix-blx-rel-thumb.d}}
"cortex-a8-fix-blx-rel-thumb"}
{"Cortex-A8 erratum fix, relocate bl.w and far call"
- "-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004 --defsym far_fn=0x7fff0000 --defsym _start=0" "-EL" {cortex-a8-far-1.s cortex-a8-far-2.s}
+ "-EL -Ttext=0x00 --fix-cortex-a8 --defsym far_fn1=0x80000000 --defsym far_fn2=0x80000004 --defsym far_fn=0x7fff0000 --defsym _start=0"
+ "-EL -mcpu=cortex-a8" {cortex-a8-far-1.s cortex-a8-far-2.s}
{{objdump -dr cortex-a8-far.d}}
"cortex-a8-far"}
{"Cortex-A8 erratum fix, headers"
- "-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t" "-EL" {cortex-a8-fix-hdr.s}
+ "-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t"
+ "-EL -mcpu=cortex-a8" {cortex-a8-fix-hdr.s}
{{objdump -dr cortex-a8-fix-hdr.d}}
"cortex-a8-fix-hdr"}
{"Unwinding and -gc-sections" "-gc-sections" "" {gc-unwind.s}