#include "sim/byteswap.hh"
#include "sim/sim_object.hh"
-using namespace std;
-
const char X86ISA::ACPI::RSDP::signature[] = "RSD PTR ";
X86ISA::ACPI::RSDP::RSDP(const Params &p) : SimObject(p), oemID(p.oem_id),
#include "mem/port_proxy.hh"
#include "sim/byteswap.hh"
-using namespace std;
using namespace X86ISA;
template<class T>
#include "params/X86IntelMPBusHierarchy.hh"
#include "params/X86IntelMPCompatAddrSpaceMod.hh"
-using namespace std;
-
const char X86ISA::IntelMP::FloatingPointer::signature[] = "_MP_";
template<class T>
}
uint8_t
-writeOutString(PortProxy& proxy, Addr addr, string str, int length)
+writeOutString(PortProxy& proxy, Addr addr, std::string str, int length)
{
char cleanedString[length + 1];
cleanedString[length] = 0;
proxy.writeBlob(addr + 43, &reserved, 1);
checkSum += reserved;
- vector<BaseConfigEntry *>::iterator baseEnt;
+ std::vector<BaseConfigEntry *>::iterator baseEnt;
uint16_t offset = 44;
for (baseEnt = baseEntries.begin();
baseEnt != baseEntries.end(); baseEnt++) {
// We've found the end of the base table this point.
checkSum += writeOutField(proxy, addr + 4, offset);
- vector<ExtConfigEntry *>::iterator extEnt;
+ std::vector<ExtConfigEntry *>::iterator extEnt;
uint16_t extOffset = 0;
uint8_t extCheckSum = 0;
for (extEnt = extEntries.begin();
#include "params/X86SMBiosSMBiosTable.hh"
#include "sim/byteswap.hh"
-using namespace std;
-
const char X86ISA::SMBios::SMBiosTable::SMBiosHeader::anchorString[] = "_SM_";
const uint8_t X86ISA::SMBios::SMBiosTable::
SMBiosHeader::formattedArea[] = {0,0,0,0,0};
}
int
-X86ISA::SMBios::SMBiosStructure::addString(const string &new_string)
+X86ISA::SMBios::SMBiosStructure::addString(const std::string &new_string)
{
stringFields = true;
// If a string is empty, treat it as not existing. The index for empty
return strings.size();
}
-string
+std::string
X86ISA::SMBios::SMBiosStructure::readString(int n)
{
assert(n > 0 && n <= strings.size());
#include "sim/sim_exit.hh"
using namespace X86ISA;
-using namespace std;
}};
#include "sim/syscall_return.hh"
#include "sim/system.hh"
-using namespace std;
using namespace X86ISA;
template class MultiLevelPageTable<LongModePTE<47, 39>,
Addr next_thread_stack_base = stack_base - max_stack_size;
Addr mmap_end = 0x7FFFF7FFF000ULL;
- memState = make_shared<MemState>(this, brk_point, stack_base,
- max_stack_size, next_thread_stack_base,
- mmap_end);
+ memState = std::make_shared<MemState>(
+ this, brk_point, stack_base, max_stack_size,
+ next_thread_stack_base, mmap_end);
}
Addr next_thread_stack_base = stack_base - max_stack_size;
Addr mmap_end = 0xB7FFF000ULL;
- memState = make_shared<MemState>(this, brk_point, stack_base,
- max_stack_size, next_thread_stack_base,
- mmap_end);
+ memState = std::make_shared<MemState>(
+ this, brk_point, stack_base, max_stack_size,
+ next_thread_stack_base, mmap_end);
}
void
std::vector<AuxVector<IntType>> auxv = extraAuxvs;
- string filename;
+ std::string filename;
if (argv.size() < 1)
filename = "";
else
const int numRandomBytes = 16;
int aux_data_size = numRandomBytes;
- string platform = "x86_64";
+ std::string platform = "x86_64";
aux_data_size += platform.size() + 1;
int env_data_size = 0;
#include "mem/page_table.hh"
#include "sim/full_system.hh"
-using namespace std;
using namespace X86ISA;
RemoteGDB::RemoteGDB(System *_system, ThreadContext *c, int _port) :
#include "sim/serialize.hh"
using namespace X86ISA;
-using namespace std;
template <>
void
-paramOut(CheckpointOut &cp, const string &name, ExtMachInst const &machInst)
+paramOut(CheckpointOut &cp, const std::string &name,
+ ExtMachInst const &machInst)
{
// Prefixes
paramOut(cp, name + ".legacy", (uint8_t)machInst.legacy);
template <>
void
-paramIn(CheckpointIn &cp, const string &name, ExtMachInst &machInst)
+paramIn(CheckpointIn &cp, const std::string &name, ExtMachInst &machInst)
{
uint8_t temp8;
// Prefixes