[(set_attr "type" "fpspc")
(set_attr "mode" "XF")])
-(define_insn "atan2df3"
+(define_insn "atan2df3_1"
[(parallel [(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF [(match_operand:DF 2 "register_operand" "0")
(match_operand:DF 1 "register_operand" "u")]
[(set_attr "type" "fpspc")
(set_attr "mode" "DF")])
-(define_insn "atan2sf3"
+(define_expand "atan2df3"
+ [(use (match_operand:DF 0 "register_operand" "=f"))
+ (use (match_operand:DF 2 "register_operand" "0"))
+ (use (match_operand:DF 1 "register_operand" "u"))]
+ "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
+ && flag_unsafe_math_optimizations"
+{
+ rtx copy = gen_reg_rtx (DFmode);
+ emit_move_insn (copy, operands[1]);
+ emit_insn (gen_atan2df3_1 (operands[0], copy, operands[2]));
+ DONE;
+}
+
+(define_insn "atan2sf3_1"
[(parallel [(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF [(match_operand:SF 2 "register_operand" "0")
(match_operand:SF 1 "register_operand" "u")]
[(set_attr "type" "fpspc")
(set_attr "mode" "SF")])
-(define_insn "atan2xf3"
+(define_expand "atan2sf3"
+ [(use (match_operand:SF 0 "register_operand" "=f"))
+ (use (match_operand:SF 2 "register_operand" "0"))
+ (use (match_operand:SF 1 "register_operand" "u"))]
+ "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
+ && flag_unsafe_math_optimizations"
+{
+ rtx copy = gen_reg_rtx (SFmode);
+ emit_move_insn (copy, operands[1]);
+ emit_insn (gen_atan2sf3_1 (operands[0], copy, operands[2]));
+ DONE;
+}
+
+(define_insn "atan2xf3_1"
[(parallel [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 2 "register_operand" "0")
(match_operand:XF 1 "register_operand" "u")]
UNSPEC_FPATAN))
(clobber (match_dup 1))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
- && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
+ && flag_unsafe_math_optimizations && ! TARGET_128BIT_LONG_DOUBLE"
"fpatan"
[(set_attr "type" "fpspc")
(set_attr "mode" "XF")])
-(define_insn "atan2tf3"
+(define_expand "atan2xf3"
+ [(use (match_operand:XF 0 "register_operand" "=f"))
+ (use (match_operand:XF 2 "register_operand" "0"))
+ (use (match_operand:XF 1 "register_operand" "u"))]
+ "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
+ && flag_unsafe_math_optimizations && ! TARGET_128BIT_LONG_DOUBLE"
+{
+ rtx copy = gen_reg_rtx (XFmode);
+ emit_move_insn (copy, operands[1]);
+ emit_insn (gen_atan2xf3_1 (operands[0], copy, operands[2]));
+ DONE;
+}
+
+(define_insn "atan2tf3_1"
[(parallel [(set (match_operand:TF 0 "register_operand" "=f")
(unspec:TF [(match_operand:TF 2 "register_operand" "0")
(match_operand:TF 1 "register_operand" "u")]
[(set_attr "type" "fpspc")
(set_attr "mode" "XF")])
+(define_expand "atan2tf3"
+ [(use (match_operand:TF 0 "register_operand" "=f"))
+ (use (match_operand:TF 2 "register_operand" "0"))
+ (use (match_operand:TF 1 "register_operand" "u"))]
+ "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
+ && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
+{
+ rtx copy = gen_reg_rtx (TFmode);
+ emit_move_insn (copy, operands[1]);
+ emit_insn (gen_atan2tf3_1 (operands[0], copy, operands[2]));
+ DONE;
+}
+
(define_insn "*fyl2x_sfxf3"
[(parallel [(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF [(match_operand:SF 2 "register_operand" "0")