i386-cadd.c: Compile using -march=k8.

	* gcc.dg/i386-cadd.c:  Compile using -march=k8.
	* gcc.dg/i386-cmov?.c:  Likewise.
	* gcc.dg/i386-fpcvt-?.c:  Likewise.
	* gcc.dg/i386-ssefp-1.c:  Likewise.
	* gcc.dg/i386-ssetype-?.c:  Likewise; fix for register passing
	convetions.

From-SVN: r62394

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6ed5733aa2126134af06f2bf25513468f7e048cb..1d32a755acdd146993c209c3cf4d791288a0dc82 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+Tue Feb  4 21:41:09 CET 2003  Jan Hubicka  <jh@suse.cz>
+
+       * gcc.dg/i386-cadd.c:  Compile using -march=k8.
+       * gcc.dg/i386-cmov?.c:  Likewise.
+       * gcc.dg/i386-fpcvt-?.c:  Likewise.
+       * gcc.dg/i386-ssefp-1.c:  Likewise.
+       * gcc.dg/i386-ssetype-?.c:  Likewise; fix for register passing
+       convetions.
+
 2003-02-03  Mark Mitchell  <mark@codesourcery.com>
 
        PR c++/7129

diff --git a/gcc/testsuite/gcc.dg/i386-cadd.c b/gcc/testsuite/gcc.dg/i386-cadd.c
index 46bfd221e076fd7b788f85960e7d0e5472fff8eb..ef6c16bee78244c600c63408fe6cb01f64ea6267 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-cadd.c
+++ b/gcc/testsuite/gcc.dg/i386-cadd.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=athlon" } */
+/* { dg-options "-O2 -march=k8" } */
 /* { dg-final { scan-assembler "sbb" } } */
 
 /* Conditional increment is best done using sbb $-1, val.  */

diff --git a/gcc/testsuite/gcc.dg/i386-cmov1.c b/gcc/testsuite/gcc.dg/i386-cmov1.c
index 1f7ff727bc4da3fdf995b84302e7bbdff794e6bf..38aa6a62a60b9ba5e897c41008426a3376cb9819 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-cmov1.c
+++ b/gcc/testsuite/gcc.dg/i386-cmov1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=athlon" } */
+/* { dg-options "-O2 -march=k8" } */
 /* { dg-final { scan-assembler "sar.*magic_namea" } } */
 /* { dg-final { scan-assembler "sar.*magic_nameb" } } */
 /* { dg-final { scan-assembler "sar.*magic_namec" } } */

diff --git a/gcc/testsuite/gcc.dg/i386-cmov2.c b/gcc/testsuite/gcc.dg/i386-cmov2.c
index f4edfbf64c01470dcbe8993d4d344a2f997b5930..cd6457f0d5f13fcd0bf5a54f0f22d3cbc26efc5a 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-cmov2.c
+++ b/gcc/testsuite/gcc.dg/i386-cmov2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=athlon" } */
+/* { dg-options "-O2 -march=k8" } */
 /* { dg-final { scan-assembler "sbb" } } */
 
 /* This conditional move is fastest to be done using sbb.  */

diff --git a/gcc/testsuite/gcc.dg/i386-cmov3.c b/gcc/testsuite/gcc.dg/i386-cmov3.c
index 9e5a6361e52561a74e88b01c44a6960e3d70f20e..6ef2675297d1ce33959896b25db3f83c113c02da 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-cmov3.c
+++ b/gcc/testsuite/gcc.dg/i386-cmov3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=athlon" } */
+/* { dg-options "-O2 -march=k8" } */
 /* { dg-final { scan-assembler "cmov" } } */
 
 /* This conditional move is fastest to be done using cmov.  */

diff --git a/gcc/testsuite/gcc.dg/i386-cmov4.c b/gcc/testsuite/gcc.dg/i386-cmov4.c
index 1601f2251b5297746438cf0cec1f16abd79b6f60..e293b34abc175c574e9dc6f23ce20fbe87fc6ea1 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-cmov4.c
+++ b/gcc/testsuite/gcc.dg/i386-cmov4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=athlon" } */
+/* { dg-options "-O2 -march=k8" } */
 /* { dg-final { scan-assembler "cmov" } } */
 
 /* Verify that if conversion happends for memory references.  */

diff --git a/gcc/testsuite/gcc.dg/i386-cmov5.c b/gcc/testsuite/gcc.dg/i386-cmov5.c
index d119abd4160d978d90040bc7535762881e7943dc..112a9933bbca1255f6d114b2c0b6df4631558291 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-cmov5.c
+++ b/gcc/testsuite/gcc.dg/i386-cmov5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -march=athlon" } */
+/* { dg-options "-O2 -march=k8" } */
 /* { dg-final { scan-assembler "sbb" } } */
 
 int

diff --git a/gcc/testsuite/gcc.dg/i386-fpcvt-1.c b/gcc/testsuite/gcc.dg/i386-fpcvt-1.c
index 716073eeeb3b0f7041d466cfdf3c11d4c1f9b005..6e65b10416375f6630623a9667a51f8cdc0a8a74 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-fpcvt-1.c
+++ b/gcc/testsuite/gcc.dg/i386-fpcvt-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
 /* { dg-final { scan-assembler-not "cvtss2sd" } } */
 float a,b;
 main()

diff --git a/gcc/testsuite/gcc.dg/i386-fpcvt-2.c b/gcc/testsuite/gcc.dg/i386-fpcvt-2.c
index 12d149b13992d98abfe8166873795002c8e5a05e..613c20760197c103cabb8d27842cb9895735acee 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-fpcvt-2.c
+++ b/gcc/testsuite/gcc.dg/i386-fpcvt-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
 /* { dg-final { scan-assembler-not "cvtss2sd" } } */
 float a,b;
 main()

diff --git a/gcc/testsuite/gcc.dg/i386-fpcvt-3.c b/gcc/testsuite/gcc.dg/i386-fpcvt-3.c
index 9a7733363bab2e65ad132cc32dded7f5ac8e99b8..69d7e3d2cd6544bdbda63a2986e43906714ebf61 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-fpcvt-3.c
+++ b/gcc/testsuite/gcc.dg/i386-fpcvt-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
 /* { dg-final { scan-assembler-not "cvtss2sd" } } */
 float a,b;
 main()

diff --git a/gcc/testsuite/gcc.dg/i386-mmx-3.c b/gcc/testsuite/gcc.dg/i386-mmx-3.c
index f44fa0fbfdd70daef3207ba09d528e41b1cef92c..b417ddae9ba13279f692de87e9a699a579d70856 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-mmx-3.c
+++ b/gcc/testsuite/gcc.dg/i386-mmx-3.c
@@ -1,7 +1,7 @@
 /* PR target/8870 */
 /* Originator: otaylor@redhat.com */
-/* { dg-do compile { target i?86-*-* } } */
-/* { dg-options "-O1 -mmmx -march=i686" } */
+/* { dg-do compile { target i?86-*-* x86_64-*-*} } */
+/* { dg-options "-O1 -mmmx -march=k8" } */
 
 typedef int v4hi __attribute__ ((mode (V4HI)));
 

diff --git a/gcc/testsuite/gcc.dg/i386-ssefp-1.c b/gcc/testsuite/gcc.dg/i386-ssefp-1.c
index ad6f109bc99ad60ccda44643900f97654379ba53..d11a72f111827c985e8bee12b59eb87ec45d4335 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssefp-1.c
+++ b/gcc/testsuite/gcc.dg/i386-ssefp-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon -mfpmath=sse" } */
+/* { dg-options "-O2 -msse2 -march=k8 -mfpmath=sse" } */
 /* { dg-final { scan-assembler "maxsd" } } */
 /* { dg-final { scan-assembler "minsd" } } */
 double x;

diff --git a/gcc/testsuite/gcc.dg/i386-ssefp-2.c b/gcc/testsuite/gcc.dg/i386-ssefp-2.c
index 0d1ced2fee06ec28f970387d662fc76b7599b112..687902416781c3f4e9f91c257bcf2da73d221be4 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssefp-2.c
+++ b/gcc/testsuite/gcc.dg/i386-ssefp-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon -mfpmath=sse" } */
+/* { dg-options "-O2 -msse2 -march=k8 -mfpmath=sse" } */
 /* { dg-final { scan-assembler "maxsd" } } */
 /* { dg-final { scan-assembler "minsd" } } */
 double x;

diff --git a/gcc/testsuite/gcc.dg/i386-ssetype-1.c b/gcc/testsuite/gcc.dg/i386-ssetype-1.c
index 6953b751b434c587ac249ead8dbbe53d1093872c..87921713becc221d2b39d72ee0c5160c26aad938 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssetype-1.c
+++ b/gcc/testsuite/gcc.dg/i386-ssetype-1.c
@@ -1,32 +1,35 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
-/* { dg-final { scan-assembler "andpd.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "andnpd.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "xorpd.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "orpd.*\[bs\]p" } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "andpd.*magic" } } */
+/* { dg-final { scan-assembler "andnpd.*magic" } } */
+/* { dg-final { scan-assembler "xorpd.*magic" } } */
+/* { dg-final { scan-assembler "orpd.*magic" } } */
 /* { dg-final { scan-assembler-not "movdqa" } } */
-/* { dg-final { scan-assembler "movapd.*\[bs\]p" } } */
+/* { dg-final { scan-assembler "movapd.*magic" } } */
 
 /* Verify that we generate proper instruction with memory operand.  */
 
 #include <xmmintrin.h>
+
+__m128d magic_a, magic_b;
+
 __m128d
-t1(__m128d a, __m128d b)
+t1(void)
 {
-return _mm_and_pd (a,b);
+return _mm_and_pd (magic_a,magic_b);
 }
 __m128d
-t2(__m128d a, __m128d b)
+t2(void)
 {
-return _mm_andnot_pd (a,b);
+return _mm_andnot_pd (magic_a,magic_b);
 }
 __m128d
-t3(__m128d a, __m128d b)
+t3(void)
 {
-return _mm_or_pd (a,b);
+return _mm_or_pd (magic_a,magic_b);
 }
 __m128d
-t4(__m128d a, __m128d b)
+t4(void)
 {
-return _mm_xor_pd (a,b);
+return _mm_xor_pd (magic_a,magic_b);
 }

diff --git a/gcc/testsuite/gcc.dg/i386-ssetype-2.c b/gcc/testsuite/gcc.dg/i386-ssetype-2.c
index b66aa0cfd9893a0382a8ce4bf9296d46f3a8fed9..1f9bedd0220db20232a52f4d53598a0cadea91ab 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssetype-2.c
+++ b/gcc/testsuite/gcc.dg/i386-ssetype-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
 /* { dg-final { scan-assembler "andpd" } } */
 /* { dg-final { scan-assembler "andnpd" } } */
 /* { dg-final { scan-assembler "xorpd" } } */

diff --git a/gcc/testsuite/gcc.dg/i386-ssetype-3.c b/gcc/testsuite/gcc.dg/i386-ssetype-3.c
index 4988c0c5abda1712ce24b454fe3ee310b8248d53..bbc6f823bd9f02d79a21a9901cf34aafa94d5fad 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssetype-3.c
+++ b/gcc/testsuite/gcc.dg/i386-ssetype-3.c
@@ -1,32 +1,34 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
-/* { dg-final { scan-assembler "andps.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "andnps.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "xorps.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "orps.*\[bs\]p" } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "andps.*magic" } } */
+/* { dg-final { scan-assembler "andnps.*magic" } } */
+/* { dg-final { scan-assembler "xorps.*magic" } } */
+/* { dg-final { scan-assembler "orps.*magic" } } */
 /* { dg-final { scan-assembler-not "movdqa" } } */
-/* { dg-final { scan-assembler "movaps.*\[bs\]p" } } */
+/* { dg-final { scan-assembler "movaps.*magic" } } */
 
 /* Verify that we generate proper instruction with memory operand.  */
 
 #include <xmmintrin.h>
+
+__m128 magic_a, magic_b;
 __m128
-t1(__m128 a, __m128 b)
+t1(void)
 {
-return _mm_and_ps (a,b);
+return _mm_and_ps (magic_a,magic_b);
 }
 __m128
-t2(__m128 a, __m128 b)
+t2(void)
 {
-return _mm_andnot_ps (a,b);
+return _mm_andnot_ps (magic_a,magic_b);
 }
 __m128
-t3(__m128 a, __m128 b)
+t3(void)
 {
-return _mm_or_ps (a,b);
+return _mm_or_ps (magic_a,magic_b);
 }
 __m128
-t4(__m128 a, __m128 b)
+t4(void)
 {
-return _mm_xor_ps (a,b);
+return _mm_xor_ps (magic_a,magic_b);
 }

diff --git a/gcc/testsuite/gcc.dg/i386-ssetype-4.c b/gcc/testsuite/gcc.dg/i386-ssetype-4.c
index ef6a93f6c16951b0df33e2c4751f3b3e90a4ee95..e9d989ba974ed530d7059af41eacfa0c54204792 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssetype-4.c
+++ b/gcc/testsuite/gcc.dg/i386-ssetype-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
 /* { dg-final { scan-assembler "andps" } } */
 /* { dg-final { scan-assembler "andnps" } } */
 /* { dg-final { scan-assembler "xorps" } } */

diff --git a/gcc/testsuite/gcc.dg/i386-ssetype-5.c b/gcc/testsuite/gcc.dg/i386-ssetype-5.c
index 97cc22fd3a811ab1bde2000427d69382ac1c4c50..31a8b9981e89fc201273f7640570fc97f886a151 100644 (file)
--- a/gcc/testsuite/gcc.dg/i386-ssetype-5.c
+++ b/gcc/testsuite/gcc.dg/i386-ssetype-5.c
@@ -1,33 +1,34 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse2 -march=athlon" } */
-/* { dg-final { scan-assembler "pand.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "pandn.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "pxor.*\[bs\]p" } } */
-/* { dg-final { scan-assembler "por.*\[bs\]p" } } */
+/* { dg-options "-O2 -msse2 -march=k8" } */
+/* { dg-final { scan-assembler "pand.*magic" } } */
+/* { dg-final { scan-assembler "pandn.*magic" } } */
+/* { dg-final { scan-assembler "pxor.*magic" } } */
+/* { dg-final { scan-assembler "por.*magic" } } */
 /* { dg-final { scan-assembler "movdqa" } } */
-/* { dg-final { scan-assembler-not "movaps.*\[bs\]p" } } */
+/* { dg-final { scan-assembler-not "movaps.*magic" } } */
 
 /* Verify that we generate proper instruction with memory operand.  */
 
 #include <xmmintrin.h>
+__m128i magic_a, magic_b;
 __m128i
-t1(__m128i a, __m128i b)
+t1(void)
 {
-return _mm_and_si128 (a,b);
+return _mm_and_si128 (magic_a,magic_b);
 }
 __m128i
-t2(__m128i a, __m128i b)
+t2(void)
 {
-return _mm_andnot_si128 (a,b);
+return _mm_andnot_si128 (magic_a,magic_b);
 }
 __m128i
-t3(__m128i a, __m128i b)
+t3(void)
 {
-return _mm_or_si128 (a,b);
+return _mm_or_si128 (magic_a,magic_b);
 }
 __m128i
-t4(__m128i a, __m128i b)
+t4(void)
 {
-return _mm_xor_si128 (a,b);
+return _mm_xor_si128 (magic_a,magic_b);
 }