+2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * config/s390/constraints.md ("jKK"): New constraint.
+ * config/s390/s390.c (tm-constrs.h): Include for
+ satisfies_constraint_*.
+ (s390_legitimate_constant_p): Allow jKK constants. Use
+ satisfies_constraint_* also for the others.
+ (legitimate_reload_vector_constant_p): Likewise.
+ (print_operand): Allow h output modifier on vectors.
+ * config/s390/vector.md ("mov<mode>"): Add vrepi.
+
2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vector.md ("*vec_splats<mode>"): Fix constraint
;; jm1: constant scalar or vector with all bits set
;; jxx: contiguous bitmask of 0 or 1 in all vector elements
;; jyy: constant consisting of byte chunks being either 0 or 0xff
+;; jKK: constant vector with all elements having the same value and
+;; matching K constraint
;; t -- Access registers 36 and 37.
;; v -- Vector registers v0-v31.
;; C -- A signed 8-bit constant (-128..127)
"FP_REGS"
"Floating point registers")
-(define_constraint "j00"
- "Zero scalar or vector constant"
- (match_test "op == CONST0_RTX (GET_MODE (op))"))
-
-(define_constraint "jm1"
- "All one bit scalar or vector constant"
- (match_test "op == CONSTM1_RTX (GET_MODE (op))"))
-
-(define_constraint "jxx"
- "@internal"
- (and (match_code "const_vector")
- (match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)")))
-
-(define_constraint "jyy"
- "@internal"
- (and (match_code "const_vector")
- (match_test "s390_bytemask_vector_p (op, NULL)")))
(define_register_constraint "t"
"ACCESS_REGS"
(match_test "s390_O_constraint_str ('n', ival)")))
+;;
+;; Vector constraints follow.
+;;
+
+(define_constraint "j00"
+ "Zero scalar or vector constant"
+ (match_test "op == CONST0_RTX (GET_MODE (op))"))
+
+(define_constraint "jm1"
+ "All one bit scalar or vector constant"
+ (match_test "op == CONSTM1_RTX (GET_MODE (op))"))
+
+(define_constraint "jxx"
+ "@internal"
+ (and (match_code "const_vector")
+ (match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)")))
+
+(define_constraint "jyy"
+ "@internal"
+ (and (match_code "const_vector")
+ (match_test "s390_bytemask_vector_p (op, NULL)")))
+
+(define_constraint "jKK"
+ "@internal"
+ (and (and (match_code "const_vector")
+ (match_test "const_vec_duplicate_p (op)"))
+ (match_test "satisfies_constraint_K (XVECEXP (op, 0, 0))")))
;;
#include "builtins.h"
#include "rtl-iter.h"
#include "intl.h"
+#include "tm-constrs.h"
/* This file should be included last. */
#include "target-def.h"
if (GET_MODE_SIZE (mode) != 16)
return 0;
- if (!const0_operand (op, mode)
- && !s390_contiguous_bitmask_vector_p (op, NULL, NULL)
- && !s390_bytemask_vector_p (op, NULL))
+ if (!satisfies_constraint_j00 (op)
+ && !satisfies_constraint_jm1 (op)
+ && !satisfies_constraint_jKK (op)
+ && !satisfies_constraint_jxx (op)
+ && !satisfies_constraint_jyy (op))
return 0;
}
static bool
legitimate_reload_vector_constant_p (rtx op)
{
- /* FIXME: Support constant vectors with all the same 16 bit unsigned
- operands. These can be loaded with vrepi. */
-
if (TARGET_VX && GET_MODE_SIZE (GET_MODE (op)) == 16
- && (const0_operand (op, GET_MODE (op))
- || constm1_operand (op, GET_MODE (op))
- || s390_contiguous_bitmask_vector_p (op, NULL, NULL)
- || s390_bytemask_vector_p (op, NULL)))
+ && (satisfies_constraint_j00 (op)
+ || satisfies_constraint_jm1 (op)
+ || satisfies_constraint_jKK (op)
+ || satisfies_constraint_jxx (op)
+ || satisfies_constraint_jyy (op)))
return true;
return false;
case CONST_VECTOR:
switch (code)
{
+ case 'h':
+ gcc_assert (const_vec_duplicate_p (x));
+ fprintf (file, HOST_WIDE_INT_PRINT_DEC,
+ ((INTVAL (XVECEXP (x, 0, 0)) & 0xffff) ^ 0x8000) - 0x8000);
+ break;
case 'e':
case 's':
{
; Full HW vector size moves
(define_insn "mov<mode>"
- [(set (match_operand:V_128 0 "nonimmediate_operand" "=v, v,QR, v, v, v, v,v,d")
- (match_operand:V_128 1 "general_operand" " v,QR, v,j00,jm1,jyy,jxx,d,v"))]
+ [(set (match_operand:V_128 0 "nonimmediate_operand" "=v, v,QR, v, v, v, v, v,v,d")
+ (match_operand:V_128 1 "general_operand" " v,QR, v,j00,jm1,jyy,jxx,jKK,d,v"))]
"TARGET_VX"
"@
vlr\t%v0,%v1
vone\t%v0
vgbm\t%v0,%t1
vgm<bhfgq>\t%v0,%s1,%e1
+ vrepi<bhfgq>\t%v0,%h1
vlvgp\t%v0,%1,%N1
#"
- [(set_attr "op_type" "VRR,VRX,VRX,VRI,VRI,VRI,VRI,VRR,*")])
+ [(set_attr "op_type" "VRR,VRX,VRX,VRI,VRI,VRI,VRI,VRI,VRR,*")])
(define_split
[(set (match_operand:V_128 0 "register_operand" "")
+2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * gcc.target/s390/vector/vec-vrepi-1.c: New test.
+
2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/zvector/vec-splat-1.c: New test.
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
+/* { dg-require-effective-target vector } */
+
+typedef unsigned char uv16qi __attribute__((vector_size(16)));
+typedef unsigned short uv8hi __attribute__((vector_size(16)));
+typedef unsigned int uv4si __attribute__((vector_size(16)));
+typedef unsigned long long uv2di __attribute__((vector_size(16)));
+
+uv2di __attribute__((noinline))
+foo1 ()
+{
+ return (uv2di){ 0x7f0f, 0x7f0f };
+}
+/* { dg-final { scan-assembler-times "vrepig\t%v24,32527" 1 } } */
+
+uv4si __attribute__((noinline))
+foo2 ()
+{
+ return (uv4si){ 0x7f0f, 0x7f0f, 0x7f0f, 0x7f0f };
+}
+/* { dg-final { scan-assembler-times "vrepif\t%v24,32527" 1 } } */
+
+uv8hi __attribute__((noinline))
+foo3 ()
+{
+ return (uv8hi){ 0x7f0f, 0x7f0f, 0x7f0f, 0x7f0f,
+ 0x7f0f, 0x7f0f, 0x7f0f, 0x7f0f };
+}
+/* { dg-final { scan-assembler-times "vrepih\t%v24,32527" 1 } } */
+
+uv16qi __attribute__((noinline))
+foo4 ()
+{
+ return (uv16qi){ 0x77, 0x77, 0x77, 0x77,
+ 0x77, 0x77, 0x77, 0x77,
+ 0x77, 0x77, 0x77, 0x77,
+ 0x77, 0x77, 0x77, 0x77 };
+}
+/* { dg-final { scan-assembler-times "vrepib\t%v24,119" 1 } } */
+
+int
+main ()
+{
+ if (foo1()[1] != 0x7f0f)
+ __builtin_abort ();
+
+ if (foo2()[1] != 0x7f0f)
+ __builtin_abort ();
+
+ if (foo3()[1] != 0x7f0f)
+ __builtin_abort ();
+
+ if (foo4()[1] != 0x77)
+ __builtin_abort ();
+
+ return 0;
+}