cpu/vexriscv: fix flush_cpu_icache, remove workaround on boot.c.

diff --git a/litex/soc/cores/cpu/vexriscv/system.h b/litex/soc/cores/cpu/vexriscv/system.h
index 952b5b326c7236f93fc4708f091c659080da7e2a..a8fbe42bbc9c625dee780af882f67c500d333384 100644 (file)
--- a/litex/soc/cores/cpu/vexriscv/system.h
+++ b/litex/soc/cores/cpu/vexriscv/system.h
@@ -10,7 +10,7 @@ extern "C" {
 __attribute__((unused)) static void flush_cpu_icache(void)
 {
   asm volatile(
-    ".word(0x400F)\n"
+    ".word(0x100F)\n"
     "nop\n"
     "nop\n"
     "nop\n"

diff --git a/litex/soc/software/bios/boot.c b/litex/soc/software/bios/boot.c
index 08b3be4a8ad061a4d4f800e2fe6cb83f8b4bedfa..8f53fcca3ec2232e966d4f11d18326f917acd636 100644 (file)
--- a/litex/soc/software/bios/boot.c
+++ b/litex/soc/software/bios/boot.c
@@ -43,10 +43,7 @@ static void __attribute__((noreturn)) boot(unsigned long r1, unsigned long r2, u
        irq_setmask(0);
        irq_setie(0);
 #endif
-/* FIXME: understand why flushing icache on Vexriscv make boot fail  */
-#ifndef __vexriscv__
        flush_cpu_icache();
-#endif
        flush_cpu_dcache();
 #ifdef CONFIG_L2_SIZE
        flush_l2_cache();