+Tue Nov 2 17:04:36 1999 Nick Clifton <nickc@cygnus.com>
+
+ * config/arm/tpe.h: Add prototypes for exported functions.
+ * config/arm/pe.c: Fix compile time warnings.
+ * config/arm/semi.h: Fix compile time warnings.
+ * config/arm/arm.c: Fix compile time warnings.
+ * config/arm/arm.h: Fix compile time warnings.
+ * config/arm/arm.md: Fix compile time warnings.
+ * config/arm/thumb.c: Fix compile time warnings.
+ * config/arm/thumb.h: Fix compile time warnings.
+ * config/arm/thumb.md: Fix compile time warnings.
+
Tue Nov 2 04:10:24 1999 Jan Hubicka <hubicka@freesoft.cz>
* jump.c (jump_optimize_1): Swap the incscc and the conditional mode
/* Restore recog_data (getting the attributes of other insns can
destroy this array, but final.c assumes that it remains intact
across this call; since the insn has been recognized already we
- call recog direct). */
+ call recog direct). */
recog (PATTERN (insn), insn, NULL_PTR);
}
}
"
/* Default is little endian, which doesn't define anything. */
-#define CPP_ENDIAN_DEFAULT_SPEC ""
+#define CPP_ENDIAN_DEFAULT_SPEC "-D__ARMEL__"
#define CC1_SPEC ""
/* Nonzero if function prologues should not load the PIC register. */
#define ARM_FLAG_SINGLE_PIC_BASE (1 << 14)
+/* Nonzero if all call instructions should be indirect. */
+#define ARM_FLAG_LONG_CALLS (1 << 15)
+
#define TARGET_APCS (target_flags & ARM_FLAG_APCS_FRAME)
#define TARGET_POKE_FUNCTION_NAME (target_flags & ARM_FLAG_POKE)
#define TARGET_FPE (target_flags & ARM_FLAG_FPE)
#define TARGET_NO_SCHED_PRO (target_flags & ARM_FLAG_NO_SCHED_PRO)
#define TARGET_ABORT_NORETURN (target_flags & ARM_FLAG_ABORT_NORETURN)
#define TARGET_SINGLE_PIC_BASE (target_flags & ARM_FLAG_SINGLE_PIC_BASE)
+#define TARGET_LONG_CALLS (target_flags & ARM_FLAG_LONG_CALLS)
/* SUBTARGET_SWITCHES is used to add flags on a per-config basis.
Bit 31 is reserved. See riscix.h. */
{"single-pic-base", ARM_FLAG_SINGLE_PIC_BASE, \
"Do not load the PIC register in function prologues" }, \
{"no-single-pic-base", -ARM_FLAG_SINGLE_PIC_BASE, "" }, \
+ {"long-calls", ARM_FLAG_LONG_CALLS, \
+ "Generate all call instructions as indirect calls"}, \
+ {"no-long-calls", -ARM_FLAG_LONG_CALLS, ""}, \
SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT, "" } \
}
void aof_delete_import PROTO ((char *));
void aof_dump_imports STDIO_PROTO ((FILE *));
#endif
+
+/* Define in pe.c */
+int arm_pe_return_in_memory PROTO ((Tree));
+int arm_dllexport_p PROTO ((Tree));
+int arm_dllimport_p PROTO ((Tree));
+int arm_dllexport_name_p PROTO ((char *));
+int arm_dllimport_name_p PROTO ((char *));
+
#endif /* HAVE_CONFIG_H */
#endif /* __ARM_H__ */
(match_operand:SI 3 "arm_rhs_operand" "rM")]))
(match_operand:SI 1 "s_register_operand" "r")))]
""
- "bic%?\\t%0, %1, %2%S4")
+ "bic%?\\t%0, %1, %2%S4"
+)
(define_insn "*andsi_notsi_si_compare0"
[(set (reg:CC_NOOV 24)
[(match_operand:SI 1 "s_register_operand" "r")
(match_operand:SI 2 "reg_or_int_operand" "rM")]))]
""
- "mov%?\\t%0, %1%S3")
+ "mov%?\\t%0, %1%S3"
+)
(define_insn "*shiftsi3_compare0"
[(set (reg:CC_NOOV 24)
(match_op_dup 3 [(match_dup 1) (match_dup 2)]))]
""
"mov%?s\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*shiftsi3_compare0_scratch"
[(set (reg:CC_NOOV 24)
(clobber (match_scratch:SI 0 "=r"))]
""
"mov%?s\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*notsi_shiftsi"
[(set (match_operand:SI 0 "s_register_operand" "=r")
[(match_operand:SI 1 "s_register_operand" "r")
(match_operand:SI 2 "arm_rhs_operand" "rM")])))]
""
- "mvn%?\\t%0, %1%S3")
+ "mvn%?\\t%0, %1%S3"
+)
(define_insn "*notsi_shiftsi_compare0"
[(set (reg:CC_NOOV 24)
(not:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])))]
""
"mvn%?s\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*not_shiftsi_compare0_scratch"
[(set (reg:CC_NOOV 24)
(clobber (match_scratch:SI 0 "=r"))]
""
"mvn%?s\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
\f
;; Unary arithmetic insns
(set_attr "pool_range" "4096")])
(define_insn "pic_add_dot_plus_eight"
- [(set (match_operand 0 "register_operand" "+r")
+ [(set (match_operand:SI 0 "register_operand" "+r")
(plus:SI (match_dup 0) (const (plus:SI (pc) (const_int 8)))))
(use (label_ref (match_operand 1 "" "")))]
"flag_pic"
(match_operand:SI 2 "arm_rhs_operand" "rM")])))]
""
"cmp%?\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*cmpsi_shiftsi_swp"
[(set (reg:CC_SWP 24)
(match_operand:SI 0 "s_register_operand" "r")))]
""
"cmp%?\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*cmpsi_neg_shiftsi"
[(set (reg:CC 24)
(match_operand:SI 2 "arm_rhs_operand" "rM")]))))]
""
"cmn%?\\t%0, %1%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*cmpsf_insn"
[(set (reg:CCFP 24)
(match_operand 1 "general_operand" ""))
(clobber (reg:SI 14))])]
""
- "")
+ "
+ {
+ if (TARGET_LONG_CALLS && GET_CODE (XEXP (operands[0], 0)) != REG)
+ XEXP (operands[0], 0) = force_reg (Pmode, XEXP (operands[0], 0));
+ }"
+)
(define_insn "*call_reg"
[(call (mem:SI (match_operand:SI 0 "s_register_operand" "r"))
(set_attr "type" "call")])
(define_insn "*call_mem"
- [(call (mem:SI (match_operand 0 "memory_operand" "m"))
+ [(call (mem:SI (match_operand:SI 0 "memory_operand" "m"))
(match_operand 1 "general_operand" "g"))
(clobber (reg:SI 14))]
""
(match_operand 2 "general_operand" "g")))
(clobber (reg:SI 14))])]
""
- "")
+ "
+ {
+ if (TARGET_LONG_CALLS && GET_CODE (XEXP (operands[1], 0)) != REG)
+ XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
+ }"
+)
(define_insn "*call_value_reg"
[(set (match_operand 0 "" "=rf")
[(call (mem:SI (match_operand:SI 0 "" "X"))
(match_operand:SI 1 "general_operand" "g"))
(clobber (reg:SI 14))]
- "GET_CODE (operands[0]) == SYMBOL_REF"
+ "! TARGET_LONG_CALLS && GET_CODE (operands[0]) == SYMBOL_REF"
"*
{
return NEED_PLT_RELOC ? \"bl%?\\t%a0(PLT)\" : \"bl%?\\t%a0\";
(call (mem:SI (match_operand:SI 1 "" "X"))
(match_operand:SI 2 "general_operand" "g")))
(clobber (reg:SI 14))]
- "GET_CODE(operands[1]) == SYMBOL_REF"
+ "! TARGET_LONG_CALLS && GET_CODE(operands[1]) == SYMBOL_REF"
"*
{
return NEED_PLT_RELOC ? \"bl%?\\t%a1(PLT)\" : \"bl%?\\t%a1\";
(match_operand:SI 5 "reg_or_int_operand" "rI")])
(match_operand:SI 2 "s_register_operand" "r")]))]
""
- "%i1%?\\t%0, %2, %4%S3")
+ "%i1%?\\t%0, %2, %4%S3"
+)
(define_insn "*arith_shiftsi_compare0"
[(set (reg:CC_NOOV 24)
(match_dup 2)]))]
""
"%i1%?s\\t%0, %2, %4%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*arith_shiftsi_compare0_scratch"
[(set (reg:CC_NOOV 24)
(clobber (match_scratch:SI 0 "=r"))]
""
"%i1%?s\\t%0, %2, %4%S3"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*sub_shiftsi"
[(set (match_operand:SI 0 "s_register_operand" "=r")
[(match_operand:SI 3 "s_register_operand" "r")
(match_operand:SI 4 "reg_or_int_operand" "rM")])))]
""
- "sub%?\\t%0, %1, %3%S2")
+ "sub%?\\t%0, %1, %3%S2"
+)
(define_insn "*sub_shiftsi_compare0"
[(set (reg:CC_NOOV 24)
(match_dup 4)])))]
""
"sub%?s\\t%0, %1, %3%S2"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
(define_insn "*sub_shiftsi_compare0_scratch"
[(set (reg:CC_NOOV 24)
(clobber (match_scratch:SI 0 "=r"))]
""
"sub%?s\\t%0, %1, %3%S2"
-[(set_attr "conds" "set")])
+ [(set_attr "conds" "set")
+])
;; These variants of the above insns can occur if the first operand is the
;; frame pointer and we eliminate that. This is a kludge, but there doesn't
(set_attr "length" "8,12")])
(define_insn "*cmp_ite0"
- [(set (match_operand 6 "dominant_cc_register" "")
+ [(set (match_operand:CC 6 "dominant_cc_register" "")
(compare
(if_then_else:SI
(match_operator 4 "comparison_operator"
(set_attr "length" "8")])
(define_insn "*cmp_ite1"
- [(set (match_operand 6 "dominant_cc_register" "")
+ [(set (match_operand:CC 6 "dominant_cc_register" "")
(compare
(if_then_else:SI
(match_operator 4 "comparison_operator"
#include "flags.h"
#include "tree.h"
#include "expr.h"
+#include "toplev.h"
extern int current_function_anonymous_args;
int
arm_pe_valid_machine_decl_attribute (decl, attributes, attr, args)
tree decl;
- tree attributes;
+ tree attributes ATTRIBUTE_UNUSED;
tree attr;
tree args;
{
return a;
}
\f
+#if 0
/* Check a type that has a virtual table, and see if any virtual methods are
marked for import or export, and if so, arrange for the vtable to
be imported or exported. */
return 0;
}
+#endif
/* Return non-zero if DECL is a dllexport'd object. */
#define LINK_SPEC "%{mbig-endian:-EB} -X"
+#ifndef TARGET_VERSION
#define TARGET_VERSION fputs (" (ARM/semi-hosted)", stderr);
+#endif
+#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT ARM_FLAG_APCS_32
+#endif
#include "arm/aout.h"
-#undef CPP_APCS_PC_DEFAULT_SPEC
+#undef CPP_APCS_PC_DEFAULT_SPEC
#define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
int current_function_anonymous_args = 0;
/* Used to parse -mstructure_size_boundary command line option. */
-char * structure_size_string = NULL;
-int arm_structure_size_boundary = 32; /* Used to be 8 */
+const char * structure_size_string = NULL;
+int arm_structure_size_boundary = 32; /* Used to be 8 */
/* The register number to be used for the PIC offset register. */
const char * thumb_pic_register_string = NULL;
thumb_shiftable_const (val)
HOST_WIDE_INT val;
{
- unsigned HOST_WIDE_INT mask = 0xff;
+ HOST_WIDE_INT mask = 0xff;
int i;
for (i = 0; i < 25; i++)
int
thumb_trivial_epilogue ()
{
- int regno;
-
/* ??? If this function ever returns 1, we get a function without any
epilogue at all. It appears that the intent was to cause a "return"
insn to be emitted, but that does not happen. */
\f
/* Return TRUE if X references a SYMBOL_REF. */
int
-symbol_mentioned_p (x)
+thumb_symbol_mentioned_p (x)
rtx x;
{
register const char * fmt;
register int j;
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
- if (symbol_mentioned_p (XVECEXP (x, i, j)))
+ if (thumb_symbol_mentioned_p (XVECEXP (x, i, j)))
return 1;
}
- else if (fmt[i] == 'e' && symbol_mentioned_p (XEXP (x, i)))
+ else if (fmt[i] == 'e' && thumb_symbol_mentioned_p (XEXP (x, i)))
return 1;
}
static rtx pic_rtx;
int
-is_pic(x)
+is_pic (x)
rtx x;
{
if (x == pic_rtx)
enum machine_mode mode;
{
int i;
- rtx lab;
HOST_WIDE_INT offset;
if (mode == SImode && GET_CODE (x) == MEM && CONSTANT_P (XEXP (x, 0))
&& GET_CODE (PATTERN (from)) == SET
&& CONSTANT_P (SET_SRC (PATTERN (from)))
&& CONSTANT_POOL_ADDRESS_P (SET_SRC (PATTERN (from))))
- {
- rtx src = SET_SRC (PATTERN (from));
- count += 2;
- }
+ count += 2;
else
count += get_attr_length (from);
void
thumb_reload_out_si (operands)
- rtx operands;
+ rtx operands ATTRIBUTE_UNUSED;
{
abort ();
}
/* Routines for emitting code */
void
-final_prescan_insn(insn)
+thumb_final_prescan_insn (insn)
rtx insn;
{
- extern int *insn_addresses;
+ extern int * insn_addresses;
if (flag_print_asm_name)
fprintf (asm_out_file, "%s 0x%04x\n", ASM_COMMENT_START,
int regs_available_for_popping;
int regs_to_pop;
int pops_needed;
- int reg;
int available;
int required;
int mode;
void
thumb_function_prologue (f, frame_size)
- FILE *f;
- int frame_size;
+ FILE * f;
+ int frame_size ATTRIBUTE_UNUSED;
{
- int amount = frame_size + current_function_outgoing_args_size;
int live_regs_mask = 0;
int high_regs_pushed = 0;
int store_arg_regs = 0;
&& ! (TARGET_SINGLE_PIC_BASE && (regno == thumb_pic_register)))
live_regs_mask |= 1 << regno;
- if (live_regs_mask || ! leaf_function_p () || far_jump_used_p())
+ if (live_regs_mask || ! leaf_function_p () || far_jump_used_p ())
live_regs_mask |= 1 << 14;
if (TARGET_BACKTRACE)
int offset;
int work_register = 0;
-
/* We have been asked to create a stack backtrace structure.
The code looks like this:
{
/* See if the a4 register is free. */
- if (regs_ever_live[ 3 ] == 0)
+ if (regs_ever_live [3] == 0)
work_register = 3;
else /* We must push a register of our own */
live_regs_mask |= (1 << 7);
}
}
+/* Functions to save and restore thumb_return_addr_rtx. */
+static rtx thumb_return_addr_rtx = NULL_RTX;
+
+struct machine_function
+{
+ rtx ra_rtx;
+};
+
+static void
+thumb_save_machine_status (p)
+ struct function * p;
+{
+ struct machine_function * machine =
+ (struct machine_function *) xmalloc (sizeof (* machine));
+
+ p->machine = machine;
+ machine->ra_rtx = thumb_return_addr_rtx;
+}
+
+static void
+thumb_restore_machine_status (p)
+ struct function * p;
+{
+ struct machine_function * machine = p->machine;
+
+ thumb_return_addr_rtx = machine->ra_rtx;
+
+ free (machine);
+
+ p->machine = (struct machine_function *) NULL;
+}
+
+/* Return an RTX indicating where the return address to the
+ calling function can be found. */
+rtx
+thumb_return_addr (count)
+ int count;
+{
+ if (count != 0)
+ return NULL_RTX;
+
+ if (thumb_return_addr_rtx == NULL_RTX)
+ {
+ rtx init;
+
+ thumb_return_addr_rtx = gen_reg_rtx (Pmode);
+
+ init = gen_rtx_REG (Pmode, 14);
+
+ init = gen_rtx_SET (VOIDmode, thumb_return_addr_rtx, init);
+
+ /* Emit the insn to the prologue with the other argument copies. */
+ push_topmost_sequence ();
+ emit_insn_after (init, get_insns ());
+ pop_topmost_sequence ();
+ }
+
+ return thumb_return_addr_rtx;
+}
+
+/* Do anything needed before RTL is emitted for each function. */
+void
+thumb_init_expanders ()
+{
+ thumb_return_addr_rtx = NULL_RTX;
+
+ /* Arrange to save and restore machine status around nested functions. */
+ save_machine_status = thumb_save_machine_status;
+ restore_machine_status = thumb_restore_machine_status;
+}
+
void
thumb_expand_prologue ()
{
{
int regno;
rtx reg;
-
+
/* The stack decrement is too big for an immediate value in a single
insn. In theory we could issue multiple subtracts, but after
three of them it becomes more space efficient to place the full
}
}
+ /* This should only happen with optimisation disabled. Emit the copy
+ *after* the stack adjust, as the unoptimised code will attempt to store
+ local variables at positive offsets from the frame pointer. */
if (frame_pointer_needed)
{
if (current_function_outgoing_args_size)
emit_insn (gen_movsi (frame_pointer_rtx, stack_pointer_rtx));
}
- /* if (profile_flag || profile_block_flag) */
- emit_insn (gen_blockage ());
+ if (profile_flag || profile_block_flag)
+ emit_insn (gen_blockage ());
}
void
{
HOST_WIDE_INT amount = (get_frame_size ()
+ current_function_outgoing_args_size);
- int regno;
-
#ifdef THUMB_PE
/* Naked functions don't have epilogues. */
if (arm_naked_function_p (current_function_decl))
emit_insn (gen_movsi (reg, GEN_INT (amount)));
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg));
}
- /* if (profile_flag || profile_block_flag) */
- emit_insn (gen_blockage ());
}
+
+ /* Emit a USE (stack_pointer_rtx), so that
+ the stack adjustment will not be deleted. */
+ emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
+
+ if (profile_flag || profile_block_flag)
+ emit_insn (gen_blockage ());
}
void
thumb_function_epilogue (f, frame_size)
- FILE *f;
- int frame_size;
+ FILE * f ATTRIBUTE_UNUSED;
+ int frame_size ATTRIBUTE_UNUSED;
{
/* ??? Probably not safe to set this here, since it assumes that a
function will be emitted as assembly immediately after we generate
#define TARGET_SWITCHES \
{ \
- {"big-endian", THUMB_FLAG_BIG_END}, \
- {"little-endian", -THUMB_FLAG_BIG_END}, \
- {"thumb-interwork", ARM_FLAG_THUMB}, \
- {"no-thumb-interwork", -ARM_FLAG_THUMB}, \
- {"tpcs-frame", THUMB_FLAG_BACKTRACE}, \
- {"no-tpcs-frame", -THUMB_FLAG_BACKTRACE}, \
- {"tpcs-leaf-frame", THUMB_FLAG_LEAF_BACKTRACE}, \
- {"no-tpcs-leaf-frame", -THUMB_FLAG_LEAF_BACKTRACE}, \
- {"callee-super-interworking", THUMB_FLAG_CALLEE_SUPER_INTERWORKING}, \
- {"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING}, \
- {"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING}, \
- {"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING}, \
+ {"big-endian", THUMB_FLAG_BIG_END, ""}, \
+ {"little-endian", -THUMB_FLAG_BIG_END, ""}, \
+ {"thumb-interwork", ARM_FLAG_THUMB, ""}, \
+ {"no-thumb-interwork", -ARM_FLAG_THUMB, ""}, \
+ {"tpcs-frame", THUMB_FLAG_BACKTRACE, ""}, \
+ {"no-tpcs-frame", -THUMB_FLAG_BACKTRACE, ""}, \
+ {"tpcs-leaf-frame", THUMB_FLAG_LEAF_BACKTRACE, ""}, \
+ {"no-tpcs-leaf-frame", -THUMB_FLAG_LEAF_BACKTRACE, ""}, \
+ {"callee-super-interworking", THUMB_FLAG_CALLEE_SUPER_INTERWORKING, ""}, \
+ {"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING, ""}, \
+ {"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING, ""}, \
+ {"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING, ""}, \
{"single-pic-base", THUMB_FLAG_SINGLE_PIC_BASE, \
"Do not load the PIC register in function prologues" }, \
- {"no-single-pic-base", -THUMB_FLAG_SINGLE_PIC_BASE, "" }, \
+ {"no-single-pic-base", -THUMB_FLAG_SINGLE_PIC_BASE, ""}, \
SUBTARGET_SWITCHES \
- {"", TARGET_DEFAULT} \
+ {"", TARGET_DEFAULT, ""} \
}
#define TARGET_OPTIONS \
{ \
- { "structure-size-boundary=", & structure_size_string }, \
+ { "structure-size-boundary=", & structure_size_string, \
+ "Specify the structure aligment: 8 or 32 bits" }, \
{ "pic-register=", & thumb_pic_register_string, \
"Specify the register to be used for PIC addressing" } \
}
#define STRUCTURE_SIZE_BOUNDARY 32
/* Used when parsing command line option -mstructure_size_boundary. */
-extern char * structure_size_string;
+extern const char * structure_size_string;
#define STRICT_ALIGNMENT 1
#define REG_CLASS_CONTENTS \
{ \
- 0x00000, \
- 0x000f0, \
- 0x000ff, \
- 0x02000, \
- 0x020ff, \
- 0x0ff00, \
- 0x1ffff, \
+ { 0x00000 }, \
+ { 0x000f0 }, \
+ { 0x000ff }, \
+ { 0x02000 }, \
+ { 0x020ff }, \
+ { 0x0ff00 }, \
+ { 0x1ffff }, \
}
#define REGNO_REG_CLASS(REGNO) \
(OFFSET) += current_function_outgoing_args_size; \
}
+/* A C expression whose value is RTL representing the value of the return
+ address for the frame COUNT steps up from the current frame. */
+
+#define RETURN_ADDR_RTX(COUNT, FRAME) \
+ thumb_return_addr (COUNT)
/* Passing Arguments on the stack */
+/* Initialize data used by insn expanders. This is called from insn_emit,
+ once for every function before code is generated. */
+#define INIT_EXPANDERS thumb_init_expanders ()
+
#define PROMOTE_PROTOTYPES 1
#define ACCUMULATE_OUTGOING_ARGS 1
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. */
#define LEGITIMATE_PIC_OPERAND_P(X) \
- (! symbol_mentioned_p (X) \
+ (! thumb_symbol_mentioned_p (X) \
&& (! CONSTANT_POOL_ADDRESS_P (X) \
- || ! symbol_mentioned_p (get_pool_constant (X))))
+ || ! thumb_symbol_mentioned_p (get_pool_constant (X))))
/* We need to know when we are making a constant pool; this determines
whether data needs to be in the GOT or can be referenced via a GOT
&& GET_CODE (X) == SYMBOL_REF \
&& CONSTANT_POOL_ADDRESS_P (X) \
&& ! (flag_pic \
- && symbol_mentioned_p (get_pool_constant (X)))) \
+ && thumb_symbol_mentioned_p (get_pool_constant (X)))) \
goto WIN; \
}
/* We can't directly access anything that contains a symbol,
nor can we indirect via the constant pool. */
#define LEGITIMATE_PIC_OPERAND_P(X) \
- (! symbol_mentioned_p (X) \
+ (! thumb_symbol_mentioned_p (X) \
&& (! CONSTANT_POOL_ADDRESS_P (X) \
- || ! symbol_mentioned_p (get_pool_constant (X))))
+ || ! thumb_symbol_mentioned_p (get_pool_constant (X))))
/* We need to know when we are making a constant pool; this determines
whether data needs to be in the GOT or can be referenced via a GOT
asm_fprintf ((STREAM), "\tpush {%R%s}\n", reg_names[(REGNO)])
#define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
- fprintf ((STREAM), "\tpop {%R%s}\n", reg_names[(REGNO)])
+ asm_fprintf ((STREAM), "\tpop {%R%s}\n", reg_names[(REGNO)])
#define FINAL_PRESCAN_INSN(INSN,OPVEC,NOPERANDS) \
- final_prescan_insn((INSN))
+ thumb_final_prescan_insn (INSN)
\f
/* Controlling Debugging Information Format */
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
/* The literal pool needs to reside in the text area due to the
limited PC addressing range: */
-#define MACHINE_DEPENDENT_REORG(INSN) thumb_reorg ((INSN))
+#define MACHINE_DEPENDENT_REORG(INSN) thumb_reorg (INSN)
\f
/* Options specific to Thumb */
extern char * output_return ();
extern int far_jump_used_p();
extern int is_called_in_ARM_mode ();
+extern void thumb_finalize_pic ();
+extern void thumb_reorg ();
+extern void thumb_override_options ();
+extern int is_pic ();
+extern int thumb_symbol_mentioned_p ();
+extern void thumb_function_prologue ();
+extern void thumb_function_epilogue ();
+extern void thumb_print_operand ();
+extern void thumb_final_prescan_insn ();
+extern int thumb_cmp_operand ();
+extern void thumb_expand_movstrqi ();
+extern void thumb_expand_prologue ();
+extern void thumb_expand_epilogue ();
+extern int arm_valid_machine_decl_attribute ();
+extern void thumb_init_expanders ();
+
+#ifndef RTX_CODE
+struct rtx_def;
+#define Rtx struct rtx_def *
+#else
+#define Rtx rtx
+#endif
+
+extern Rtx thumb_return_addr ();
{
switch (which_alternative)
{
+ default:
+ abort ();
case 0:
if (REGNO (operands[1]) == REGNO (operands[0]) + 1)
return \"add\\t%0, %1, #0\;add\\t%H0, %H1, #0\";
"*
switch (which_alternative)
{
+ default:
+ abort ();
case 0:
if (REGNO (operands[1]) == REGNO (operands[0]) + 1)
return \"add\\t%0, %1, #0\;add\\t%H0, %H1, #0\";
;; Arithmetic insns
+(define_insn "negdi2"
+ [(set (match_operand:DI 0 "register_operand" "=&l")
+ (neg:DI (match_operand:DI 1 "register_operand" "l")))]
+ ""
+ "neg\\t%Q0, %Q1\;mov\\t%R0, #0\;sbc\\t%R0, %R1"
+ [(set_attr "conds" "changed")
+ (set_attr "length" "6")]
+)
+
(define_insn "adddi3"
[(set (match_operand:DI 0 "register_operand" "=l")
(plus:DI (match_operand:DI 1 "register_operand" "%0")
""
"add\\t%Q0, %Q0, %Q2\;adc\\t%R0, %R0, %R2"
[(set_attr "conds" "changed")
- (set_attr "length" "8")])
+ (set_attr "length" "4")])
;; register group 'k' is a single register group containing only the stack
;; register. Trying to reload it will always fail catastrophically,
""
"sub\\t%Q0, %Q0, %Q2\;sbc\\t%R0, %R0, %R2"
[(set_attr "conds" "changed")
- (set_attr "length" "8")])
+ (set_attr "length" "4")])
(define_insn "subsi3"
[(set (match_operand:SI 0 "register_operand" "=l")
[(unspec_volatile [(const_int 0)] 5)]
""
"*
+ extern void assemble_align ();
assemble_align (32);
return \"\";
")
"ldr\\t%0, %a1")
(define_insn "pic_add_dot_plus_four"
- [(set (match_operand 0 "register_operand" "+r")
+ [(set (match_operand:SI 0 "register_operand" "+r")
(plus:SI (match_dup 0) (const (plus:SI (pc) (const_int 4)))))
(use (label_ref (match_operand 1 "" "")))]
"flag_pic"
#define RETURN_IN_MEMORY(TYPE) \
((TYPE_MODE ((TYPE)) == BLKmode && ! TYPE_NO_FORCE_BLK (TYPE)) \
|| (AGGREGATE_TYPE_P ((TYPE)) && arm_pe_return_in_memory ((TYPE))))
+extern int arm_pe_return_in_memory ();
\f
/* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
is a valid machine specific attribute for DECL.
\f
extern int thumb_pe_valid_machine_decl_attribute ();
+extern int arm_dllexport_p ();
+extern int arm_dllimport_p ();
+extern int arm_dllexport_name_p ();
+extern int arm_dllimport_name_p ();
+extern int arm_pe_return_in_memory ();
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