change FPSCR to a required parameter of ISACallerHelper

diff --git a/src/openpower/decoder/helpers.py b/src/openpower/decoder/helpers.py
index cb4f5addf6e11a3857ab8950ce0e12245b36a6b5..6f451972cad194b82908b4bca2b37e7452bc969f 100644 (file)
--- a/src/openpower/decoder/helpers.py
+++ b/src/openpower/decoder/helpers.py
@@ -841,8 +841,11 @@ def log2(val):
 
 
 class ISACallerHelper:
-    def __init__(self, XLEN):
+    def __init__(self, XLEN, FPSCR):
         self.__XLEN = XLEN
+        if FPSCR is None:
+            FPSCR = FPSCRState()
+        self.__FPSCR = FPSCR
 
     @property
     def XLEN(self):
@@ -850,10 +853,7 @@ class ISACallerHelper:
 
     @property
     def FPSCR(self):
-        # fallback for when not used through ISACaller
-        # needed for tests that use DOUBLE2SINGLE without using ISACaller
-        self.__dict__["FPSCR"] = retval = FPSCRState()
-        return retval
+        return self.__FPSCR
 
     def EXTZXL(self, value, bits=None):
         if bits is None:
@@ -942,7 +942,8 @@ class ISACallerHelper:
 
 class HelperTests(unittest.TestCase, ISACallerHelper):
     def __init__(self, *args, **kwargs):
-        ISACallerHelper.__init__(self, 64) # TODO: dynamic (64/32/16/8)
+        # TODO: dynamic (64/32/16/8)
+        ISACallerHelper.__init__(self, 64, FPSCR=None)
         unittest.TestCase.__init__(self, *args, **kwargs)
 
     def test_MASK(self):

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 7671bc67b65bf343bc3d3ca12af602f728376458..e3a3473cdfba6b96a55711afd0d48a80ced75e78 100644 (file)
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1265,7 +1265,7 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop):
         self.decoder = decoder2.dec
         self.dec2 = decoder2
 
-        super().__init__(XLEN=self.namespace["XLEN"])
+        super().__init__(XLEN=self.namespace["XLEN"], FPSCR=self.fpscr)
 
     @property
     def XLEN(self):

diff --git a/src/openpower/decoder/isa/test_caller_svp64_dct.py b/src/openpower/decoder/isa/test_caller_svp64_dct.py
index 0e3796b47a47a6aa80a8cb718a5684a84992a533..7fc6260c659800bfddcf0e74e31a9b925eff3f00 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_svp64_dct.py
+++ b/src/openpower/decoder/isa/test_caller_svp64_dct.py
@@ -15,7 +15,7 @@ from openpower.sv.trans.svp64 import SVP64Asm
 
 # really bad hack.  need to access the DOUBLE2SINGLE function auto-generated
 # from pseudo-code.
-fph = ISACallerFnHelper(XLEN=64)
+fph = ISACallerFnHelper(XLEN=64, FPSCR=None)
 
 
 def transform_inner_radix2_dct(vec, ctable):

diff --git a/src/openpower/decoder/isa/test_caller_svp64_fft.py b/src/openpower/decoder/isa/test_caller_svp64_fft.py
index 649918a0b529a5e1e38a9673e34843ff86130e9e..67a6a4e98d303abaf859a29e7726a78abf26e2a3 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_svp64_fft.py
+++ b/src/openpower/decoder/isa/test_caller_svp64_fft.py
@@ -11,7 +11,7 @@ from openpower.sv.trans.svp64 import SVP64Asm
 
 # really bad hack.  need to access the DOUBLE2SINGLE function auto-generated
 # from pseudo-code.
-fph = ISACallerFnHelper(XLEN=64)
+fph = ISACallerFnHelper(XLEN=64, FPSCR=None)
 
 
 def transform_radix2(vec, exptable, reverse=False):

diff --git a/src/openpower/decoder/isa/test_caller_transcendentals.py b/src/openpower/decoder/isa/test_caller_transcendentals.py
index 306ab1f62f5874a4ad58af5d1f84f9eeb9aa8e6d..3571c1b060e890a636898b9cf05377fd087a213f 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_transcendentals.py
+++ b/src/openpower/decoder/isa/test_caller_transcendentals.py
@@ -11,7 +11,7 @@ from openpower.sv.trans.svp64 import SVP64Asm
 
 # really bad hack.  need to access the DOUBLE2SINGLE function auto-generated
 # from pseudo-code.
-fph = ISACallerFnHelper(XLEN=64)
+fph = ISACallerFnHelper(XLEN=64, FPSCR=None)
 
 
 class FPTranscendentalsTestCase(FHDLTestCase):