i965/miptree: Fix can_blit_slice()
authorNanley Chery <nanley.g.chery@intel.com>
Mon, 23 Jul 2018 17:09:20 +0000 (10:09 -0700)
committerNanley Chery <nanley.g.chery@intel.com>
Wed, 22 Aug 2018 20:53:02 +0000 (13:53 -0700)
Check the destination's row pitch against the BLT engine's row pitch
limitation as well.

Fixes: 0288fe8d0417730bdd5b3477130dd1dc32bdbcd3
("i965/miptree: Use the correct BLT pitch")

v2: Fix the Fixes tag (Dylan).
    Check the destination row pitch (Chris).

Reported-by: Dylan Baker <dylan@pnwbakers.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/mesa/drivers/dri/i965/intel_mipmap_tree.c

index b477c97e51d62fd7812dfaa863ab050596389369..983f145afc969e58cea6c8cb321df9576aca4c26 100644 (file)
@@ -3545,10 +3545,9 @@ can_blit_slice(struct intel_mipmap_tree *mt,
                const struct intel_miptree_map *map)
 {
    /* See intel_miptree_blit() for details on the 32k pitch limit. */
-   if (intel_miptree_blt_pitch(mt) >= 32768)
-      return false;
-
-   return true;
+   const unsigned src_blt_pitch = intel_miptree_blt_pitch(mt);
+   const unsigned dst_blt_pitch = ALIGN(map->w * mt->cpp, 64);
+   return src_blt_pitch < 32768 && dst_blt_pitch < 32768;
 }
 
 static bool