alpha.md (extxl+1,+2): New patterns to work around combine lossage.

        * alpha.md (extxl+1,+2): New patterns to work around
        combine lossage.

From-SVN: r21651

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 716b79d4ff0d4183bdc199577251c2cc3495e447..e1a6e38f24874617a0d7d783df2ad6588df8b0e2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Mon Aug 10 01:21:01 1998  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.md (extxl+1,+2): New patterns to work around
+       combine lossage.
+
 Sat Aug  8 19:20:22 1998 Gary Thomas (gdt@linuxppc.org)
 
        * rs6000.c (rs6000_allocate_stack_space) Fix typo which

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index a92a84700126cc6fe7bef684242319c141595072..c2eeaee951a67636919bdc8cf8323ef37c82f8cd 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -1495,6 +1495,29 @@
   "ext%M2l %r1,%3,%0"
   [(set_attr "type" "shift")])
 
+;; Combine has some strange notion of preserving existing undefined behaviour
+;; in shifts larger than a word size.  So capture these patterns that it 
+;; should have turned into zero_extracts.
+
+(define_insn ""
+  [(set (match_operand:DI 0 "register_operand" "=r")
+       (and (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
+               (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
+                          (const_int 3)))
+            (match_operand:DI 3 "mode_mask_operand" "n")))]
+  ""
+  "ext%U3l %1,%2,%0"
+  [(set_attr "type" "shift")])
+
+(define_insn ""
+  [(set (match_operand:DI 0 "register_operand" "=r")
+       (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
+         (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI")
+                    (const_int 3))))]
+  ""
+  "extql %1,%2,%0"
+  [(set_attr "type" "shift")])
+
 (define_insn "extqh"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (ashift:DI