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intel/ir/gen12: Update assert in brw_stage_has_packed_dispatch().
author
Francisco Jerez
<currojerez@riseup.net>
Thu, 22 Aug 2019 23:16:26 +0000
(16:16 -0700)
committer
Francisco Jerez
<currojerez@riseup.net>
Fri, 11 Oct 2019 19:24:16 +0000
(12:24 -0700)
Confirmed no regressions after a full Piglit run on TGL with the
brw_fs_test_dispatch_packing() test enabled.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/intel/compiler/brw_compiler.h
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diff --git
a/src/intel/compiler/brw_compiler.h
b/src/intel/compiler/brw_compiler.h
index eb084448083bf11a1746f7a37383444f72aba0d1..dd2de2094e7156995168013ca1bf350311f282ec 100644
(file)
--- a/
src/intel/compiler/brw_compiler.h
+++ b/
src/intel/compiler/brw_compiler.h
@@
-1461,7
+1461,7
@@
brw_stage_has_packed_dispatch(ASSERTED const struct gen_device_info *devinfo,
* to do a full test run with brw_fs_test_dispatch_packing() hooked up to
* the NIR front-end before changing this assertion.
*/
- assert(devinfo->gen <= 1
1
);
+ assert(devinfo->gen <= 1
2
);
switch (stage) {
case MESA_SHADER_FRAGMENT: {