.\" Automatically generated by Pod::Man version 1.15
-.\" Sun May 20 12:45:49 2001
+.\" Sat Jun 9 21:33:22 2001
.\"
.\" Standard preamble:
.\" ======================================================================
.\" ======================================================================
.\"
.IX Title "GCC 1"
-.TH GCC 1 "gcc-3.1" "2001-05-20" "GNU"
+.TH GCC 1 "gcc-3.1" "2001-06-09" "GNU"
.UC
.SH "NAME"
gcc \- \s-1GNU\s0 project C and \*(C+ compiler
\&\fB\-v \-\-target-help \-\-help\fR
.Ip "\fIC Language Options\fR" 4
.IX Item "C Language Options"
-\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fno-asm \-fno-builtin
+\&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-aux-info\fR \fIfilename\fR
+\&\fB\-fno-asm \-fno-builtin
\&\-fhosted \-ffreestanding
\&\-trigraphs \-traditional \-traditional-cpp
\&\-fallow-single-precision \-fcond-mismatch
.Ip "\fI\*(C+ Language Options\fR" 4
.IX Item " Language Options"
\&\fB\-fno-access-control \-fcheck-new \-fconserve-space
-\&\-fdollars-in-identifiers \-fno-elide-constructors
+\&\-fno-const-strings \-fdollars-in-identifiers
+\&\-fno-elide-constructors
\&\-fno-enforce-eh-specs \-fexternal-templates
\&\-falt-external-templates
\&\-ffor-scope \-fno-for-scope \-fno-gnu-keywords \-fhonor-std
-\&\-fhuge-objects \-fno-implicit-templates
+\&\-fno-implicit-templates
\&\-fno-implicit-inline-templates
\&\-fno-implement-inlines \-fms-extensions
-\&\-fno-operator-names
+\&\-fno-nonansi-builtins \-fno-operator-names
\&\-fno-optional-diags \-fpermissive
-\&\-frepo \-fno-rtti \-ftemplate-depth-\fR\fIn\fR
-\&\fB\-fuse-cxa-atexit \-fvtable-thunks \-nostdinc++
+\&\-frepo \-fno-rtti \-fstats \-ftemplate-depth-\fR\fIn\fR
+\&\fB\-fuse-cxa-atexit \-fvtable-gc \-fno-weak \-nostdinc++
\&\-fno-default-inline \-Wctor-dtor-privacy
\&\-Wnon-virtual-dtor \-Wreorder
\&\-Weffc++ \-Wno-deprecated
.Ip "\fIObjective-C Language Options\fR" 4
.IX Item "Objective-C Language Options"
\&\fB\-fconstant-string-class=\fR\fIclass name\fR
-\&\fB\-fgnu-runtime \-fnext-runtime \-gen-decls
+\&\fB\-fgnu-runtime \-fnext-runtime \-gen-decls
\&\-Wno-protocol \-Wselector\fR
.Ip "\fILanguage Independent Options\fR" 4
.IX Item "Language Independent Options"
\&\fB\-fsyntax-only \-pedantic \-pedantic-errors
\&\-w \-W \-Wall \-Waggregate-return
\&\-Wcast-align \-Wcast-qual \-Wchar-subscripts \-Wcomment
-\&\-Wconversion \-Wdisabled-optimization \-Werror
+\&\-Wconversion \-Wdisabled-optimization \-Werror
\&\-Wfloat-equal \-Wformat \-Wformat=2
-\&\-Wformat-nonliteral \-Wformat-security
-\&\-Wid-clash-\fR\fIlen\fR \fB\-Wimplicit \-Wimplicit-int
+\&\-Wformat-nonliteral \-Wformat-security
+\&\-Wimplicit \-Wimplicit-int
\&\-Wimplicit-function-declaration
\&\-Werror-implicit-function-declaration
\&\-Wimport \-Winline
\&\-Wlarger-than-\fR\fIlen\fR \fB\-Wlong-long
\&\-Wmain \-Wmissing-braces \-Wmissing-declarations
\&\-Wmissing-format-attribute \-Wmissing-noreturn
-\&\-Wmultichar \-Wno-format-extra-args \-Wno-format-y2k
+\&\-Wmultichar \-Wno-format-extra-args \-Wno-format-y2k
\&\-Wno-import \-Wpacked \-Wpadded
-\&\-Wparentheses \-Wpointer-arith \-Wredundant-decls
+\&\-Wparentheses \-Wpointer-arith \-Wredundant-decls
\&\-Wreturn-type \-Wsequence-point \-Wshadow
\&\-Wsign-compare \-Wswitch \-Wsystem-headers
\&\-Wtrigraphs \-Wundef \-Wuninitialized
\&\-Wunused-value \-Wunused-variable \-Wwrite-strings\fR
.Ip "\fIC-only Warning Options\fR" 4
.IX Item "C-only Warning Options"
-\&\fB\-Wbad-function-cast \-Wmissing-prototypes \-Wnested-externs
-\&\-Wstrict-prototypes \-Wtraditional\fR
+\&\fB\-Wbad-function-cast \-Wmissing-prototypes \-Wnested-externs
+\&\-Wstrict-prototypes \-Wtraditional\fR
.Ip "\fIDebugging Options\fR" 4
.IX Item "Debugging Options"
\&\fB\-a \-ax \-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
-\&\-fdump-unnumbered \-fdump-translation-unit=\fR\fIfile\fR
-\&\fB\-fdump-class-layout=\fR\fIfile\fR \fB\-fmem-report \-fpretend-float
+\&\-fdump-unnumbered \-fdump-translation-unit\fR[\fB-\fR\fIn\fR] \fB\-fdump-class-hierarchy\fR[\fB-\fR\fIn\fR]
+\&\fB\-fdump-ast-original\fR[\fB-\fR\fIn\fR] \fB\-fdump-ast-optimized\fR[\fB-\fR\fIn\fR]
+\&\fB\-fmem-report \-fpretend-float
\&\-fprofile-arcs \-ftest-coverage \-ftime-report
\&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf \-gdwarf-1 \-gdwarf-1+ \-gdwarf-2
\&\-ggdb \-gstabs \-gstabs+ \-gxcoff \-gxcoff+
\&\-p \-pg \-print-file-name=\fR\fIlibrary\fR \fB\-print-libgcc-file-name
+\&\-print-multi-directory \-print-multi-lib
\&\-print-prog-name=\fR\fIprogram\fR \fB\-print-search-dirs \-Q
\&\-save-temps \-time\fR
.Ip "\fIOptimization Options\fR" 4
\&\-fcse-follow-jumps \-fcse-skip-blocks \-fdata-sections \-fdce
\&\-fdelayed-branch \-fdelete-null-pointer-checks
\&\-fexpensive-optimizations \-ffast-math \-ffloat-store
-\&\-fforce-addr \-fforce-mem \-ffunction-sections \-fgcse \-fgcse-lm \-fgcse-sm
+\&\-fforce-addr \-fforce-mem \-ffunction-sections
+\&\-fgcse \-fgcse-lm \-fgcse-sm
\&\-finline-functions \-finline-limit=\fR\fIn\fR \fB\-fkeep-inline-functions
\&\-fkeep-static-consts \-fmove-all-movables
\&\-fno-default-inline \-fno-defer-pop
-\&\-fno-function-cse \-fno-guess-branch-probability
+\&\-fno-function-cse \-fno-guess-branch-probability
\&\-fno-inline \-fno-math-errno \-fno-peephole
\&\-funsafe-math-optimizations \-fno-trapping-math
\&\-fomit-frame-pointer \-foptimize-register-move
\&\-idirafter\fR \fIdir\fR
\&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
\&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
-\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR \fB\-isystem-c++\fR \fIdir\fR
+\&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
\&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc \-P \-remap
\&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
.Ip "\fIAssembler Option\fR" 4
\&\fIM680x0 Options\fR
.Sp
\&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
-\&\-m68060 \-mcpu32 \-m5200 \-m68881 \-mbitfield \-mc68000 \-mc68020
-\&\-mfpa \-mnobitfield \-mrtd \-mshort \-msoft-float \-mpcrel
-\&\-malign-int \-mstrict-align\fR
+\&\-m68060 \-mcpu32 \-m5200 \-m68881 \-mbitfield \-mc68000 \-mc68020
+\&\-mfpa \-mnobitfield \-mrtd \-mshort \-msoft-float \-mpcrel
+\&\-malign-int \-mstrict-align\fR
.Sp
\&\fIM68hc1x Options\fR
.Sp
\&\fB\-mcmodel=\fR\fIcode model\fR
\&\fB\-m32 \-m64
\&\-mapp-regs \-mbroken-saverestore \-mcypress
-\&\-mepilogue \-mfaster-structs \-mflat
+\&\-mepilogue \-mfaster-structs \-mflat
\&\-mfpu \-mhard-float \-mhard-quad-float
\&\-mimpure-text \-mlive-g0 \-mno-app-regs
-\&\-mno-epilogue \-mno-faster-structs \-mno-flat \-mno-fpu
-\&\-mno-impure-text \-mno-stack-bias \-mno-unaligned-doubles
+\&\-mno-epilogue \-mno-faster-structs \-mno-flat \-mno-fpu
+\&\-mno-impure-text \-mno-stack-bias \-mno-unaligned-doubles
\&\-msoft-float \-msoft-quad-float \-msparclite \-mstack-bias
\&\-msupersparc \-munaligned-doubles \-mv8\fR
.Sp
.Sp
\&\fI\s-1ARM\s0 Options\fR
.Sp
-\&\fB\-mapcs-frame \-mno-apcs-frame
-\&\-mapcs-26 \-mapcs-32
-\&\-mapcs-stack-check \-mno-apcs-stack-check
-\&\-mapcs-float \-mno-apcs-float
-\&\-mapcs-reentrant \-mno-apcs-reentrant
-\&\-msched-prolog \-mno-sched-prolog
-\&\-mlittle-endian \-mbig-endian \-mwords-little-endian
-\&\-malignment-traps \-mno-alignment-traps
-\&\-msoft-float \-mhard-float \-mfpe
-\&\-mthumb-interwork \-mno-thumb-interwork
-\&\-mcpu= \-march= \-mfpe=
-\&\-mstructure-size-boundary=
-\&\-mbsd \-mxopen \-mno-symrename
+\&\fB\-mapcs-frame \-mno-apcs-frame
+\&\-mapcs-26 \-mapcs-32
+\&\-mapcs-stack-check \-mno-apcs-stack-check
+\&\-mapcs-float \-mno-apcs-float
+\&\-mapcs-reentrant \-mno-apcs-reentrant
+\&\-msched-prolog \-mno-sched-prolog
+\&\-mlittle-endian \-mbig-endian \-mwords-little-endian
+\&\-malignment-traps \-mno-alignment-traps
+\&\-msoft-float \-mhard-float \-mfpe
+\&\-mthumb-interwork \-mno-thumb-interwork
+\&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpe=\fR\fIname\fR
+\&\fB\-mstructure-size-boundary=\fR\fIn\fR
+\&\fB\-mbsd \-mxopen \-mno-symrename
\&\-mabort-on-noreturn
-\&\-mlong-calls \-mno-long-calls
-\&\-mnop-fun-dllimport \-mno-nop-fun-dllimport
-\&\-msingle-pic-base \-mno-single-pic-base
-\&\-mpic-register=\fR
-.Sp
-\&\fIThumb Options\fR
-.Sp
-\&\fB\-mtpcs-frame \-mno-tpcs-frame
-\&\-mtpcs-leaf-frame \-mno-tpcs-leaf-frame
-\&\-mlittle-endian \-mbig-endian
-\&\-mthumb-interwork \-mno-thumb-interwork
-\&\-mstructure-size-boundary=
-\&\-mnop-fun-dllimport \-mno-nop-fun-dllimport
-\&\-mcallee-super-interworking \-mno-callee-super-interworking
-\&\-mcaller-super-interworking \-mno-caller-super-interworking
-\&\-msingle-pic-base \-mno-single-pic-base
-\&\-mpic-register=\fR
+\&\-mlong-calls \-mno-long-calls
+\&\-msingle-pic-base \-mno-single-pic-base
+\&\-mpic-register=\fR\fIreg\fR
+\&\fB\-mnop-fun-dllimport
+\&\-mpoke-function-name
+\&\-mthumb \-marm
+\&\-mtpcs-frame \-mtpcs-leaf-frame
+\&\-mcaller-super-interworking \-mcallee-super-interworking\fR
.Sp
\&\fI\s-1MN10200\s0 Options\fR
.Sp
.Sp
\&\fI\s-1MIPS\s0 Options\fR
.Sp
-\&\fB\-mabicalls \-mcpu=\fR\fIcpu type\fR
+\&\fB\-mabicalls \-mcpu=\fR\fIcpu type\fR
\&\fB\-membedded-data \-muninit-const-in-rodata
\&\-membedded-pic \-mfp32 \-mfp64 \-mgas \-mgp32 \-mgp64
\&\-mgpopt \-mhalf-pic \-mhard-float \-mint64 \-mips1
-\&\-mips2 \-mips3 \-mips4 \-mlong64 \-mlong32 \-mlong-calls \-mmemcpy
+\&\-mips2 \-mips3 \-mips4 \-mlong64 \-mlong32 \-mlong-calls \-mmemcpy
\&\-mmips-as \-mmips-tfile \-mno-abicalls
-\&\-mno-embedded-data \-mno-uninit-const-in-rodata \-mno-embedded-pic
-\&\-mno-gpopt \-mno-long-calls
+\&\-mno-embedded-data \-mno-uninit-const-in-rodata
+\&\-mno-embedded-pic \-mno-gpopt \-mno-long-calls
\&\-mno-memcpy \-mno-mips-tfile \-mno-rnames \-mno-stats
\&\-mrnames \-msoft-float
\&\-m4650 \-msingle-float \-mmad
\&\-mstats \-EL \-EB \-G\fR \fInum\fR \fB\-nocpp
-\&\-mabi=32 \-mabi=n32 \-mabi=64 \-mabi=eabi
-\&\-mfix7000 \-mno-crt0\fR
+\&\-mabi=32 \-mabi=n32 \-mabi=64 \-mabi=eabi
+\&\-mfix7000 \-mno-crt0\fR
.Sp
\&\fIi386 Options\fR
.Sp
-\&\fB\-mcpu=\fR\fIcpu type\fR \fB\-march=\fR\fIcpu type\fR
+\&\fB\-mcpu=\fR\fIcpu type\fR \fB\-march=\fR\fIcpu type\fR
\&\fB\-mintel-syntax \-mieee-fp \-mno-fancy-math-387
\&\-mno-fp-ret-in-387 \-msoft-float \-msvr3\-shlib
\&\-mno-wide-multiply \-mrtd \-malign-double
\&\-mpreferred-stack-boundary=\fR\fInum\fR
-\&\fB\-mthreads \-mno-align-stringops \-minline-all-stringops
-\&\-mpush-args \-maccumulate-outgoing-args \-m128bit-long-double
-\&\-m96bit-long-double \-mregparm=\fR\fInum\fR \fB\-momit-leaf-frame-pointer\fR
+\&\fB\-mthreads \-mno-align-stringops \-minline-all-stringops
+\&\-mpush-args \-maccumulate-outgoing-args \-m128bit-long-double
+\&\-m96bit-long-double \-mregparm=\fR\fInum\fR \fB\-momit-leaf-frame-pointer\fR
.Sp
\&\fI\s-1HPPA\s0 Options\fR
.Sp
\&\fB\-march=\fR\fIarchitecture type\fR
-\&\fB\-mbig-switch \-mdisable-fpregs \-mdisable-indexing
-\&\-mfast-indirect-calls \-mgas \-mjump-in-delay
+\&\fB\-mbig-switch \-mdisable-fpregs \-mdisable-indexing
+\&\-mfast-indirect-calls \-mgas \-mjump-in-delay
\&\-mlong-load-store \-mno-big-switch \-mno-disable-fpregs
\&\-mno-disable-indexing \-mno-fast-indirect-calls \-mno-gas
-\&\-mno-jump-in-delay \-mno-long-load-store
+\&\-mno-jump-in-delay \-mno-long-load-store
\&\-mno-portable-runtime \-mno-soft-float
-\&\-mno-space-regs \-msoft-float \-mpa-risc-1\-0
-\&\-mpa-risc-1\-1 \-mpa-risc-2\-0 \-mportable-runtime
+\&\-mno-space-regs \-msoft-float \-mpa-risc-1\-0
+\&\-mpa-risc-1\-1 \-mpa-risc-2\-0 \-mportable-runtime
\&\-mschedule=\fR\fIcpu type\fR \fB\-mspace-regs\fR
.Sp
\&\fIIntel 960 Options\fR
.Sp
\&\fI\s-1DEC\s0 Alpha Options\fR
.Sp
-\&\fB\-mfp-regs \-mno-fp-regs \-mno-soft-float \-msoft-float
-\&\-malpha-as \-mgas
+\&\fB\-mfp-regs \-mno-fp-regs \-mno-soft-float \-msoft-float
+\&\-malpha-as \-mgas
\&\-mieee \-mieee-with-inexact \-mieee-conformant
\&\-mfp-trap-mode=\fR\fImode\fR \fB\-mfp-rounding-mode=\fR\fImode\fR
\&\fB\-mtrap-precision=\fR\fImode\fR \fB\-mbuild-constants
\&\-mcpu=\fR\fIcpu type\fR
-\&\fB\-mbwx \-mno-bwx \-mcix \-mno-cix \-mmax \-mno-max
+\&\fB\-mbwx \-mno-bwx \-mcix \-mno-cix \-mmax \-mno-max
\&\-mmemory-latency=\fR\fItime\fR
.Sp
\&\fIClipper Options\fR
.Sp
\&\fIH8/300 Options\fR
.Sp
-\&\fB\-mrelax \-mh \-ms \-mint32 \-malign-300\fR
+\&\fB\-mrelax \-mh \-ms \-mint32 \-malign-300\fR
.Sp
\&\fI\s-1SH\s0 Options\fR
.Sp
.Sp
\&\fITMS320C3x/C4x Options\fR
.Sp
-\&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm
-\&\-mfast-fix \-mmpyi \-mbk \-mti \-mdp-isr-reload
-\&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop-unsigned
-\&\-mparallel-insns \-mparallel-mpy \-mpreserve-float\fR
+\&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm
+\&\-mfast-fix \-mmpyi \-mbk \-mti \-mdp-isr-reload
+\&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop-unsigned
+\&\-mparallel-insns \-mparallel-mpy \-mpreserve-float\fR
.Sp
\&\fIV850 Options\fR
.Sp
-\&\fB\-mlong-calls \-mno-long-calls \-mep \-mno-ep
-\&\-mprolog-function \-mno-prolog-function \-mspace
-\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
-\&\fB\-mv850 \-mbig-switch\fR
+\&\fB\-mlong-calls \-mno-long-calls \-mep \-mno-ep
+\&\-mprolog-function \-mno-prolog-function \-mspace
+\&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
+\&\fB\-mv850 \-mbig-switch\fR
.Sp
\&\fI\s-1NS32K\s0 Options\fR
.Sp
-\&\fB\-m32032 \-m32332 \-m32532 \-m32081 \-m32381 \-mmult-add \-mnomult-add
-\&\-msoft-float \-mrtd \-mnortd \-mregparam \-mnoregparam \-msb \-mnosb
-\&\-mbitfield \-mnobitfield \-mhimem \-mnohimem\fR
+\&\fB\-m32032 \-m32332 \-m32532 \-m32081 \-m32381
+\&\-mmult-add \-mnomult-add \-msoft-float \-mrtd \-mnortd
+\&\-mregparam \-mnoregparam \-msb \-mnosb
+\&\-mbitfield \-mnobitfield \-mhimem \-mnohimem\fR
.Sp
\&\fI\s-1AVR\s0 Options\fR
.Sp
-\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit-stack=\fR\fIn\fR \fB\-mno-interrupts
-\&\-mcall-prologues \-mno-tablejump \-mtiny-stack\fR
+\&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit-stack=\fR\fIn\fR \fB\-mno-interrupts
+\&\-mcall-prologues \-mno-tablejump \-mtiny-stack\fR
.Sp
\&\fIMCore Options\fR
.Sp
-\&\fB\-mhardlit \-mno-hardlit \-mdiv \-mno-div \-mrelax-immediates
-\&\-mno-relax-immediates \-mwide-bitfields \-mno-wide-bitfields
-\&\-m4byte-functions \-mno-4byte-functions \-mcallgraph-data
-\&\-mno-callgraph-data \-mslow-bytes \-mno-slow-bytes \-mno-lsim
-\&\-mlittle-endian \-mbig-endian \-m210 \-m340 \-mstack-increment\fR
+\&\fB\-mhardlit \-mno-hardlit \-mdiv \-mno-div \-mrelax-immediates
+\&\-mno-relax-immediates \-mwide-bitfields \-mno-wide-bitfields
+\&\-m4byte-functions \-mno-4byte-functions \-mcallgraph-data
+\&\-mno-callgraph-data \-mslow-bytes \-mno-slow-bytes \-mno-lsim
+\&\-mlittle-endian \-mbig-endian \-m210 \-m340 \-mstack-increment\fR
.Sp
\&\fI\s-1IA-64\s0 Options\fR
.Sp
-\&\fB\-mbig-endian \-mlittle-endian \-mgnu-as \-mgnu-ld \-mno-pic
-\&\-mvolatile-asm-stop \-mb-step \-mregister-names \-mno-sdata
-\&\-mconstant-gp \-mauto-pic \-minline-divide-min-latency
-\&\-minline-divide-max-throughput \-mno-dwarf2\-asm
+\&\fB\-mbig-endian \-mlittle-endian \-mgnu-as \-mgnu-ld \-mno-pic
+\&\-mvolatile-asm-stop \-mb-step \-mregister-names \-mno-sdata
+\&\-mconstant-gp \-mauto-pic \-minline-divide-min-latency
+\&\-minline-divide-max-throughput \-mno-dwarf2\-asm
\&\-mfixed-range=\fR\fIregister range\fR
.Ip "\fICode Generation Options\fR" 4
.IX Item "Code Generation Options"
\&\-fno-common \-fno-ident \-fno-gnu-linker
\&\-fpcc-struct-return \-fpic \-fPIC
\&\-freg-struct-return \-fshared-data \-fshort-enums
-\&\-fshort-double \-fvolatile \-fvolatile-global \-fvolatile-static
+\&\-fshort-double \-fvolatile
+\&\-fvolatile-global \-fvolatile-static
\&\-fverbose-asm \-fpack-struct \-fstack-check
\&\-fstack-limit-register=\fR\fIreg\fR \fB\-fstack-limit-symbol=\fR\fIsym\fR
\&\fB\-fargument-alias \-fargument-noalias
-\&\-fargument-noalias-global
-\&\-fleading-underscore\fR
+\&\-fargument-noalias-global \-fleading-underscore\fR
.Sh "Options Controlling the Kind of Output"
.IX Subsection "Options Controlling the Kind of Output"
Compilation can involve up to four stages: preprocessing, compilation
but are in the specified version (for example, \fB//\fR comments and
the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled.
.RE
+.Ip "\fB\-aux-info\fR \fIfilename\fR" 4
+.IX Item "-aux-info filename"
+Output to the given filename prototyped declarations for all functions
+declared and/or defined in a translation unit, including those in header
+files. This option is silently ignored in any language other than C.
+.Sp
+Besides declarations, the file indicates, in comments, the origin of
+each declaration (source file and line), whether the declaration was
+implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
+\&\fBO\fR for old, respectively, in the first character after the line
+number and the colon), and whether it came from a declaration or a
+definition (\fBC\fR or \fBF\fR, respectively, in the following
+character). In the case of function definitions, a K&R-style list of
+arguments followed by their declarations is also provided, inside
+comments, after the declaration.
.Ip "\fB\-fno-asm\fR" 4
.IX Item "-fno-asm"
Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
and faster, but since the function calls no longer appear as such, you
cannot set a breakpoint on those calls, nor can you change the behavior
of the functions by linking with a different library.
+.Sp
+In \*(C+, \fB\-fno-builtin\fR is always in effect. The \fB\-fbuiltin\fR
+option has no effect. Therefore, in \*(C+, the only way to get the
+optimization benefits of builtin functions is to call the function
+using the \fB_\|_builtin_\fR prefix. The \s-1GNU\s0 \*(C+ Standard Library uses
+builtin functions to implement many functions (like
+\&\f(CW\*(C`std::strchr\*(C'\fR), so that you automatically get efficient code.
.Ip "\fB\-fhosted\fR" 4
.IX Item "-fhosted"
Assert that compilation takes place in a hosted environment. This implies
This is equivalent to \fB\-fno-hosted\fR.
.Ip "\fB\-trigraphs\fR" 4
.IX Item "-trigraphs"
-Support \s-1ISO\s0 C trigraphs. You don't want to know about this
-brain-damage. The \fB\-ansi\fR option (and \fB\-std\fR options for
-strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
+Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
+options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
.Ip "\fB\-traditional\fR" 4
.IX Item "-traditional"
Attempt to support some aspects of traditional C compilers.
Note that this is equivalent to \fB\-fno-unsigned-char\fR, which is
the negative form of \fB\-funsigned-char\fR. Likewise, the option
\&\fB\-fno-signed-char\fR is equivalent to \fB\-funsigned-char\fR.
-.Sp
-You may wish to use \fB\-fno-builtin\fR as well as \fB\-traditional\fR
-if your program uses names that are normally \s-1GNU\s0 C builtin functions for
-other purposes of its own.
-.Sp
-You cannot use \fB\-traditional\fR if you include any header files that
-rely on \s-1ISO\s0 C features. Some vendors are starting to ship systems with
-\&\s-1ISO\s0 C header files and you cannot use \fB\-traditional\fR on such
-systems to compile files that include any system headers.
.Ip "\fB\-fsigned-bitfields\fR" 4
.IX Item "-fsigned-bitfields"
.PD 0
by default, ignore \f(CW\*(C`namespace\-declarations\*(C'\fR,
\&\f(CW\*(C`using\-declarations\*(C'\fR, \f(CW\*(C`using\-directives\*(C'\fR, and
\&\f(CW\*(C`namespace\-names\*(C'\fR, if they involve \f(CW\*(C`std\*(C'\fR.
-.Ip "\fB\-fhuge-objects\fR" 4
-.IX Item "-fhuge-objects"
-Support virtual function calls for objects that exceed the size
-representable by a \fBshort int\fR. Users should not use this flag by
-default; if you need to use it, the compiler will tell you so.
-.Sp
-This flag is not useful when compiling with \-fvtable-thunks.
-.Sp
-Like all options that change the \s-1ABI\s0, all \*(C+ code, \fIincluding
-libgcc\fR must be built with the same setting of this option.
.Ip "\fB\-fno-implicit-templates\fR" 4
.IX Item "-fno-implicit-templates"
Never emit code for non-inline templates which are instantiated
This option is required for fully standards-compliant handling of static
destructors, but will only work if your C library supports
\&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
-.Ip "\fB\-fvtable-thunks\fR" 4
-.IX Item "-fvtable-thunks"
-Use \fBthunks\fR to implement the virtual function dispatch table
-(\fBvtable\fR). The traditional (cfront-style) approach to
-implementing vtables was to store a pointer to the function and two
-offsets for adjusting the \fBthis\fR pointer at the call site. Newer
-implementations store a single pointer to a \fBthunk\fR function which
-does any necessary adjustment and then calls the target function.
-.Sp
-This option also enables a heuristic for controlling emission of
-vtables; if a class has any non-inline virtual functions, the vtable
-will be emitted in the translation unit containing the first one of
-those.
-.Sp
-Like all options that change the \s-1ABI\s0, all \*(C+ code, \fIincluding
-libgcc.a\fR must be built with the same setting of this option.
+.Ip "\fB\-fvtable-gc\fR" 4
+.IX Item "-fvtable-gc"
+Emit special relocations for vtables and virtual function references
+so that the linker can identify unused virtual functions and zero out
+vtable slots that refer to them. This is most useful with
+\&\fB\-ffunction-sections\fR and \fB\-Wl,\-\-gc-sections\fR, in order to
+also discard the functions themselves.
+.Sp
+This optimization requires \s-1GNU\s0 as and \s-1GNU\s0 ld. Not all systems support
+this option. \fB\-Wl,\-\-gc-sections\fR is ignored without \fB\-static\fR.
.Ip "\fB\-fno-weak\fR" 4
.IX Item "-fno-weak"
-Do not use weak symbol support, even if it is provied by the linker.
+Do not use weak symbol support, even if it is provided by the linker.
By default, G++ will use weak symbols if they are available. This
option exists only for testing, and should not be used by end-users;
it will result in inferior code and has no benefits. This option may
.IX Item "-Wold-style-cast ( only)"
Warn if an old-style (C-style) cast is used within a \*(C+ program. The
new-style casts (\fBstatic_cast\fR, \fBreinterpret_cast\fR, and
-\&\fBconst_cast\fR) are less vulnerable to unintended effects.
+\&\fBconst_cast\fR) are less vulnerable to unintended effects, and much
+easier to grep for.
.Ip "\fB\-Woverloaded-virtual (\*(C+ only)\fR" 4
.IX Item "-Woverloaded-virtual ( only)"
Warn when a function declaration hides virtual functions from a
future implementation may also work for \*(C+ programs.
.Sp
There is some controversy over the precise meaning of the sequence point
-rules in subtle cases. Alternative formal definitions may be found in
-Clive Feather's ``Annex S''
-<\fBhttp://wwwold.dkuug.dk/JTC1/SC22/WG14/www/docs/n925.htm\fR> and in
-Michael Norrish's thesis
-<\fBhttp://www.cl.cam.ac.uk/users/mn200/PhD/thesis-report.ps.gz\fR>.
-Other discussions are by Raymond Mak
-<\fBhttp://wwwold.dkuug.dk/JTC1/SC22/WG14/www/docs/n926.htm\fR> and
-D. Hugh Redelmeier
-<\fBhttp://wwwold.dkuug.dk/JTC1/SC22/WG14/www/docs/n927.htm\fR>.
+rules in subtle cases. Links to papers with alternative formal definitions
+and other related discussions may be found on our readings page
+<\fBhttp://gcc.gnu.org/readings.html\fR>.
.Ip "\fB\-Wreturn-type\fR" 4
.IX Item "-Wreturn-type"
Warn whenever a function is defined with a return-type that defaults to
.IX Item "-Wshadow"
Warn whenever a local variable shadows another local variable, parameter or
global variable or whenever a built-in function is shadowed.
-.Ip "\fB\-Wid-clash-\fR\fIlen\fR" 4
-.IX Item "-Wid-clash-len"
-Warn whenever two distinct identifiers match in the first \fIlen\fR
-characters. This may help you prepare a program that will compile
-with certain obsolete, brain-damaged compilers.
.Ip "\fB\-Wlarger-than-\fR\fIlen\fR" 4
.IX Item "-Wlarger-than-len"
Warn whenever an object of larger than \fIlen\fR bytes is defined.
numbers and line number note output. This makes it more feasible to
use diff on debugging dumps for compiler invocations with different
options, in particular with and without \-g.
-.Ip "\fB\-fdump-translation-unit=\fR\fIfile\fR \fB(C and \*(C+ only)\fR" 4
-.IX Item "-fdump-translation-unit=file (C and only)"
-Dump a representation of the tree structure for the entire translation
-unit to \fIfile\fR.
-.Ip "\fB\-fdump-class_layout=\fR\fIfile\fR \fB(\*(C+ only)\fR" 4
-.IX Item "-fdump-class_layout=file ( only)"
+.Ip "\fB\-fdump-translation-unit (C and \*(C+ only)\fR" 4
+.IX Item "-fdump-translation-unit (C and only)"
.PD 0
-.Ip "\fB\-fdump-class_layout (\*(C+ only)\fR" 4
-.IX Item "-fdump-class_layout ( only)"
+.Ip "\fB\-fdump-translation-unit-\fR\fInumber\fR \fB(C and \*(C+ only)\fR" 4
+.IX Item "-fdump-translation-unit-number (C and only)"
.PD
-Dump a representation of each class's heirarchy to \fIfile\fR, or
-\&\f(CW\*(C`stderr\*(C'\fR if not specified.
+Dump a representation of the tree structure for the entire translation
+unit to a file. The file name is made by appending \fI.tu\fR to the
+source file name. If the -\fInumber\fR form is used, \fInumber\fR
+controls the details of the dump as described for the \-fdump-tree options.
+.Ip "\fB\-fdump-class-hierarchy (\*(C+ only)\fR" 4
+.IX Item "-fdump-class-hierarchy ( only)"
+.PD 0
+.Ip "\fB\-fdump-class-hierarchy-\fR\fInumber\fR \fB(\*(C+ only)\fR" 4
+.IX Item "-fdump-class-hierarchy-number ( only)"
+.PD
+Dump a representation of each class's hierarchy and virtual function
+table layout to a file. The file name is made by appending \fI.class\fR
+to the source file name. If the -\fInumber\fR form is used, \fInumber\fR
+controls the details of the dump as described for the \-fdump-tree
+options.
+.Ip "\fB\-fdump-ast-\fR\fIswitch\fR \fB(\*(C+ only)\fR" 4
+.IX Item "-fdump-ast-switch ( only)"
+.PD 0
+.Ip "\fB\-fdump-ast-\fR\fIswitch\fR\fB-\fR\fInumber\fR \fB(\*(C+ only)\fR" 4
+.IX Item "-fdump-ast-switch-number ( only)"
+.PD
+Control the dumping at various stages of processing the abstract syntax
+tree to a file. The file name is generated by appending a switch
+specific suffix to the source file name. If the -\fInumber\fR form is
+used, \fInumber\fR is a bit mask which controls the details of the
+dump. The following bits are meaningful (these are not set symbolically,
+as the primary function of these dumps is for debugging gcc itself):
+.RS 4
+.Ip "\fBbit0 (1)\fR" 4
+.IX Item "bit0 (1)"
+Print the address of each node. Usually this is not meaningful as it
+changes according to the environment and source file.
+.Ip "\fBbit1 (2)\fR" 4
+.IX Item "bit1 (2)"
+Inhibit dumping of members of a scope or body of a function, unless they
+are reachable by some other path.
+.RE
+.RS 4
+.Sp
+The following tree dumps are possible:
+.RS 4
+.RE
+.Ip "\fBoriginal\fR" 4
+.IX Item "original"
+Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
+.Ip "\fBoptimized\fR" 4
+.IX Item "optimized"
+Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
+.RE
+.RS 4
+.RE
.Ip "\fB\-fpretend-float\fR" 4
.IX Item "-fpretend-float"
When running a cross-compiler, pretend that the target machine uses the
would be used when linking\-\-\-and don't do anything else. With this
option, \s-1GCC\s0 does not compile or link anything; it just prints the
file name.
+.Ip "\fB\-print-multi-directory\fR" 4
+.IX Item "-print-multi-directory"
+Print the directory name corresponding to the multilib selected by any
+other switches present in the command line. This directory is supposed
+to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
+.Ip "\fB\-print-multi-lib\fR" 4
+.IX Item "-print-multi-lib"
+Print the mapping from multilib directory names to compiler switches
+that enable them. The directory name is separated from the switches by
+\&\fB;\fR, and each switch starts with an \fB@} instead of the
+\&\f(CB@samp\fB{-\fR, without spaces between multiple switches. This is supposed to
+ease shell-processing.
.Ip "\fB\-print-prog-name=\fR\fIprogram\fR" 4
.IX Item "-print-prog-name=program"
Like \fB\-print-file-name\fR, but searches for a program such as \fBcpp\fR.
.IX Item "-fssa"
Perform optimizations in static single assignment form. Each function's
flow graph is translated into \s-1SSA\s0 form, optimizations are performed, and
-the flow graph is translated back from \s-1SSA\s0 form. User's should not
+the flow graph is translated back from \s-1SSA\s0 form. Users should not
specify this option, since it is not yet ready for production use.
.Ip "\fB\-fdce\fR" 4
.IX Item "-fdce"
.IX Item "-dI"
Output \fB#include\fR directives in addition to the result of
preprocessing.
+.Ip "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed. This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+In this mode the integrated preprocessor is little more than a tokenizer
+for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fBi\fR, \fBii\fR or \fBmi\fR indicating it has already
+been preprocessed.
.Ip "\fB\-trigraphs\fR" 4
.IX Item "-trigraphs"
Process \s-1ISO\s0 standard trigraph sequences. These are three-character
and conforming to the function calling standards for the \s-1APCS\s0 32\-bit
option. This option replaces the \fB\-m6\fR option of previous releases
of the compiler.
-.Ip "\fB\-mapcs-stack-check\fR" 4
-.IX Item "-mapcs-stack-check"
-Generate code to check the amount of stack space available upon entry to
-every function (that actually uses some stack space). If there is
-insufficient space available then either the function
-\&\fB_\|_rt_stkovf_split_small\fR or \fB_\|_rt_stkovf_split_big\fR will be
-called, depending upon the amount of stack space required. The run time
-system is required to provide these functions. The default is
-\&\fB\-mno-apcs-stack-check\fR, since this produces smaller code.
-.Ip "\fB\-mapcs-float\fR" 4
-.IX Item "-mapcs-float"
-Pass floating point arguments using the float point registers. This is
-one of the variants of the \s-1APCS\s0. This option is recommended if the
-target hardware has a floating point unit or if a lot of floating point
-arithmetic is going to be performed by the code. The default is
-\&\fB\-mno-apcs-float\fR, since integer only code is slightly increased in
-size if \fB\-mapcs-float\fR is used.
-.Ip "\fB\-mapcs-reentrant\fR" 4
-.IX Item "-mapcs-reentrant"
-Generate reentrant, position independent code. This is the equivalent
-to specifying the \fB\-fpic\fR option. The default is
-\&\fB\-mno-apcs-reentrant\fR.
.Ip "\fB\-mthumb-interwork\fR" 4
.IX Item "-mthumb-interwork"
-Generate code which supports calling between the \s-1ARM\s0 and \s-1THUMB\s0
+Generate code which supports calling between the \s-1ARM\s0 and Thumb
instruction sets. Without this option the two instruction sets cannot
be reliably used inside one program. The default is
\&\fB\-mno-thumb-interwork\fR, since slightly larger code is generated
.IX Item "-mno-alignment-traps"
Generate code that assumes that the \s-1MMU\s0 will not trap unaligned
accesses. This produces better code when the target instruction set
-does not have half-word memory operations (implementations prior to
+does not have half-word memory operations (i.e. implementations prior to
ARMv4).
.Sp
Note that you cannot use this option to access unaligned word objects,
instructions available.
.Ip "\fB\-mshort-load-bytes\fR" 4
.IX Item "-mshort-load-bytes"
-This is a deprecated alias for \fB\-malignment-traps\fR.
+.PD 0
+.Ip "\fB\-mno-short-load-words\fR" 4
+.IX Item "-mno-short-load-words"
+.PD
+These are deprecated aliases for \fB\-malignment-traps\fR.
.Ip "\fB\-mno-short-load-bytes\fR" 4
.IX Item "-mno-short-load-bytes"
-This is a deprecated alias for \fB\-mno-alignment-traps\fR.
+.PD 0
.Ip "\fB\-mshort-load-words\fR" 4
.IX Item "-mshort-load-words"
-This is a deprecated alias for \fB\-mno-alignment-traps\fR.
-.Ip "\fB\-mno-short-load-words\fR" 4
-.IX Item "-mno-short-load-words"
-This is a deprecated alias for \fB\-malignment-traps\fR.
+.PD
+This are deprecated aliases for \fB\-mno-alignment-traps\fR.
.Ip "\fB\-mbsd\fR" 4
.IX Item "-mbsd"
This option only applies to \s-1RISC\s0 iX. Emulate the native BSD-mode
preparation for linking with the \s-1RISC\s0 iX C library; this option
suppresses this pass. The post-processor is never run when the
compiler is built for cross-compilation.
-.Ip "\fB\-mcpu=<name>\fR" 4
-.IX Item "-mcpu=<name>"
+.Ip "\fB\-mcpu=\fR\fIname\fR" 4
+.IX Item "-mcpu=name"
This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
-to determine what kind of instructions it can use when generating
+to determine what kind of instructions it can emit when generating
assembly code. Permissible names are: arm2, arm250, arm3, arm6, arm60,
arm600, arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi,
arm70, arm700, arm700i, arm710, arm710c, arm7100, arm7500, arm7500fe,
arm7tdmi, arm8, strongarm, strongarm110, strongarm1100, arm8, arm810,
-arm9, arm920, arm920t, arm9tdmi.
-.Ip "\fB\-mtune=<name>\fR" 4
-.IX Item "-mtune=<name>"
+arm9, arm9e, arm920, arm920t, arm940t, arm9tdmi, arm10tdmi, arm1020t,
+xscale.
+.Ip "\fB\-mtune=\fR\fIname\fR" 4
+.IX Item "-mtune=name"
This option is very similar to the \fB\-mcpu=\fR option, except that
instead of specifying the actual target processor type, and hence
restricting which instructions can be used, it specifies that \s-1GCC\s0 should
tune the performance of the code as if the target were of the type
specified in this option, but still choosing the instructions that it
will generate based on the cpu specified by a \fB\-mcpu=\fR option.
-For some arm implementations better performance can be obtained by using
+For some \s-1ARM\s0 implementations better performance can be obtained by using
this option.
-.Ip "\fB\-march=<name>\fR" 4
-.IX Item "-march=<name>"
+.Ip "\fB\-march=\fR\fIname\fR" 4
+.IX Item "-march=name"
This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
-name to determine what kind of instructions it can use when generating
+name to determine what kind of instructions it can emit when generating
assembly code. This option can be used in conjunction with or instead
of the \fB\-mcpu=\fR option. Permissible names are: armv2, armv2a,
-armv3, armv3m, armv4, armv4t, armv5.
-.Ip "\fB\-mfpe=<number>\fR" 4
-.IX Item "-mfpe=<number>"
+armv3, armv3m, armv4, armv4t, armv5, armv5t, armv5te.
+.Ip "\fB\-mfpe=\fR\fInumber\fR" 4
+.IX Item "-mfpe=number"
.PD 0
-.Ip "\fB\-mfp=<number>\fR" 4
-.IX Item "-mfp=<number>"
+.Ip "\fB\-mfp=\fR\fInumber\fR" 4
+.IX Item "-mfp=number"
.PD
This specifies the version of the floating point emulation available on
the target. Permissible values are 2 and 3. \fB\-mfp=\fR is a synonym
-for \fB\-mfpe=\fR to support older versions of \s-1GCC\s0.
-.Ip "\fB\-mstructure-size-boundary=<n>\fR" 4
-.IX Item "-mstructure-size-boundary=<n>"
+for \fB\-mfpe=\fR, for compatibility with older versions of \s-1GCC\s0.
+.Ip "\fB\-mstructure-size-boundary=\fR\fIn\fR" 4
+.IX Item "-mstructure-size-boundary=n"
The size of all structures and unions will be rounded up to a multiple
of the number of bits set by this option. Permissible values are 8 and
32. The default value varies for different toolchains. For the \s-1COFF\s0
of the program. The two values are potentially incompatible. Code
compiled with one value cannot necessarily expect to work with code or
libraries compiled with the other value, if they exchange information
-using structures or unions. Programmers are encouraged to use the 32
-value as future versions of the toolchain may default to this value.
+using structures or unions.
.Ip "\fB\-mabort-on-noreturn\fR" 4
.IX Item "-mabort-on-noreturn"
-Generate a call to the function abort at the end of a noreturn function.
-It will be executed if the function tries to return.
+Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
+\&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
+return.
.Ip "\fB\-mlong-calls\fR" 4
.IX Item "-mlong-calls"
.PD 0
turned into long calls.
.Sp
This feature is not enabled by default. Specifying
-\&\fB\*(--no-long-calls\fR will restore the default behaviour, as will
+\&\fB\-mno-long-calls\fR will restore the default behaviour, as will
placing the function calls within the scope of a \fB#pragma
long_calls_off\fR directive. Note these switches have no effect on how
the compiler generates code to handle function calls via function
pointers.
.Ip "\fB\-mnop-fun-dllimport\fR" 4
.IX Item "-mnop-fun-dllimport"
-Disable the support for the \fIdllimport\fR attribute.
+Disable support for the \fIdllimport\fR attribute.
.Ip "\fB\-msingle-pic-base\fR" 4
.IX Item "-msingle-pic-base"
Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
loading it in the prologue for each function. The run-time system is
responsible for initialising this register with an appropriate value
before execution begins.
-.Ip "\fB\-mpic-register=<reg>\fR" 4
-.IX Item "-mpic-register=<reg>"
+.Ip "\fB\-mpic-register=\fR\fIreg\fR" 4
+.IX Item "-mpic-register=reg"
Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
unless stack-checking is enabled, when R9 is used.
-.PP
-.I "Thumb Options"
-.IX Subsection "Thumb Options"
-.Ip "\fB\-mthumb-interwork\fR" 4
-.IX Item "-mthumb-interwork"
-Generate code which supports calling between the \s-1THUMB\s0 and \s-1ARM\s0
-instruction sets. Without this option the two instruction sets cannot
-be reliably used inside one program. The default is
-\&\fB\-mno-thumb-interwork\fR, since slightly smaller code is generated
-with this option.
+.Ip "\fB\-mpoke-function-name\fR" 4
+.IX Item "-mpoke-function-name"
+Write the name of each function into the text section, directly
+preceding the function prologue. The generated code is similar to this:
+.Sp
+.Vb 9
+\& t0
+\& .ascii "arm_poke_function_name", 0
+\& .align
+\& t1
+\& .word 0xff000000 + (t1 - t0)
+\& arm_poke_function_name
+\& mov ip, sp
+\& stmfd sp!, {fp, ip, lr, pc}
+\& sub fp, ip, #4
+.Ve
+When performing a stack backtrace, code can inspect the value of
+\&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
+location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
+there is a function name embedded immediately preceding this location
+and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
+.Ip "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Generate code for the 16\-bit Thumb instruction set. The default is to
+use the 32\-bit \s-1ARM\s0 instruction set.
.Ip "\fB\-mtpcs-frame\fR" 4
.IX Item "-mtpcs-frame"
Generate a stack frame that is compliant with the Thumb Procedure Call
Standard for all non-leaf functions. (A leaf function is one that does
-not call any other functions). The default is \fB\-mno-apcs-frame\fR.
+not call any other functions.) The default is \fB\-mno-tpcs-frame\fR.
.Ip "\fB\-mtpcs-leaf-frame\fR" 4
.IX Item "-mtpcs-leaf-frame"
Generate a stack frame that is compliant with the Thumb Procedure Call
Standard for all leaf functions. (A leaf function is one that does
-not call any other functions). The default is \fB\-mno-apcs-leaf-frame\fR.
-.Ip "\fB\-mlittle-endian\fR" 4
-.IX Item "-mlittle-endian"
-Generate code for a processor running in little-endian mode. This is
-the default for all standard configurations.
-.Ip "\fB\-mbig-endian\fR" 4
-.IX Item "-mbig-endian"
-Generate code for a processor running in big-endian mode.
-.Ip "\fB\-mstructure-size-boundary=<n>\fR" 4
-.IX Item "-mstructure-size-boundary=<n>"
-The size of all structures and unions will be rounded up to a multiple
-of the number of bits set by this option. Permissible values are 8 and
-32. The default value varies for different toolchains. For the \s-1COFF\s0
-targeted toolchain the default value is 8. Specifying the larger number
-can produced faster, more efficient code, but can also increase the size
-of the program. The two values are potentially incompatible. Code
-compiled with one value cannot necessarily expect to work with code or
-libraries compiled with the other value, if they exchange information
-using structures or unions. Programmers are encouraged to use the 32
-value as future versions of the toolchain may default to this value.
-.Ip "\fB\-mnop-fun-dllimport\fR" 4
-.IX Item "-mnop-fun-dllimport"
-Disable the support for the \fIdllimport\fR attribute.
+not call any other functions.) The default is \fB\-mno-apcs-leaf-frame\fR.
.Ip "\fB\-mcallee-super-interworking\fR" 4
.IX Item "-mcallee-super-interworking"
Gives all externally visible functions in the file being compiled an \s-1ARM\s0
execute correctly regardless of whether the target code has been
compiled for interworking or not. There is a small overhead in the cost
of executing a function pointer if this option is enabled.
-.Ip "\fB\-msingle-pic-base\fR" 4
-.IX Item "-msingle-pic-base"
-Treat the register used for \s-1PIC\s0 addressing as read-only, rather than
-loading it in the prologue for each function. The run-time system is
-responsible for initialising this register with an appropriate value
-before execution begins.
-.Ip "\fB\-mpic-register=<reg>\fR" 4
-.IX Item "-mpic-register=<reg>"
-Specify the register to be used for \s-1PIC\s0 addressing. The default is R10.
.PP
.I "\s-1MN10200\s0 Options"
.IX Subsection "MN10200 Options"
.IX Subsection "Intel 960 Options"
.PP
These \fB\-m\fR options are defined for the Intel 960 implementations:
-.Ip "\fB\-m\fR\fIcpu type\fR" 4
-.IX Item "-mcpu type"
-Assume the defaults for the machine type \fIcpu type\fR for some of
+.Ip "\fB\-m\fR\fIcpu-type\fR" 4
+.IX Item "-mcpu-type"
+Assume the defaults for the machine type \fIcpu-type\fR for some of
the other options, including instruction scheduling, floating point
-support, and addressing modes. The choices for \fIcpu type\fR are
+support, and addressing modes. The choices for \fIcpu-type\fR are
\&\fBka\fR, \fBkb\fR, \fBmc\fR, \fBca\fR, \fBcf\fR,
\&\fBsa\fR, and \fBsb\fR.
The default is
unwind information for all functions, which can produce significant data
size overhead, although it does not affect execution. If you do not
specify this option, \s-1GNU\s0 \s-1CC\s0 will enable it by default for languages like
-\&\*(C+ which normally require exception handling, and disable itfor
+\&\*(C+ which normally require exception handling, and disable it for
languages like C that do not normally require it. However, you may need
to enable this option when compiling C code that needs to interoperate
properly with exception handlers written in \*(C+. You may also wish to
exists in one copy per process.
.Ip "\fB\-fno-common\fR" 4
.IX Item "-fno-common"
-Allocate even uninitialized global variables in the data section of the
+In C, allocate even uninitialized global variables in the data section of the
object file, rather than generating them as common blocks. This has the
effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in
two different compilations, you will get an error when you link them.
function, so the call site information may not be available to the
profiling functions otherwise.)
.Sp
-.Vb 2
-\& void __cyg_profile_func_enter (void *this_fn, void *call_site);
-\& void __cyg_profile_func_exit (void *this_fn, void *call_site);
+.Vb 4
+\& void __cyg_profile_func_enter (void *this_fn,
+\& void *call_site);
+\& void __cyg_profile_func_exit (void *this_fn,
+\& void *call_site);
.Ve
The first argument is the address of the start of the current function,
which may be looked up exactly in the symbol table.
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