X86: Make the apic isr and irr work.
authorGabe Black <gblack@eecs.umich.edu>
Thu, 12 Jun 2008 04:54:05 +0000 (00:54 -0400)
committerGabe Black <gblack@eecs.umich.edu>
Thu, 12 Jun 2008 04:54:05 +0000 (00:54 -0400)
src/arch/x86/miscregfile.cc

index ee71842d2494635e6663ef0064448fed778c15a6..1e02391e65661336b94bb5a09bc3256195cce0c4 100644 (file)
@@ -127,19 +127,10 @@ MiscReg MiscRegFile::readRegNoEffect(int miscReg)
 MiscReg MiscRegFile::readReg(int miscReg, ThreadContext * tc)
 {
     if (miscReg >= MISCREG_APIC_START && miscReg <= MISCREG_APIC_END) {
-        if (miscReg >= MISCREG_APIC_IN_SERVICE(0) &&
-                miscReg <= MISCREG_APIC_IN_SERVICE(15)) {
-            panic("Local APIC In-Service registers are unimplemented.\n");
-        }
         if (miscReg >= MISCREG_APIC_TRIGGER_MODE(0) &&
                 miscReg <= MISCREG_APIC_TRIGGER_MODE(15)) {
             panic("Local APIC Trigger Mode registers are unimplemented.\n");
         }
-        if (miscReg >= MISCREG_APIC_INTERRUPT_REQUEST(0) &&
-                miscReg <= MISCREG_APIC_INTERRUPT_REQUEST(15)) {
-            panic("Local APIC Interrupt Request registers "
-                    "are unimplemented.\n");
-        }
         switch (miscReg) {
           case MISCREG_APIC_ARBITRATION_PRIORITY:
             panic("Local APIC Arbitration Priority register unimplemented.\n");