2010-01-04 Daniel Gutson <dgutson@codesourcery.com>

    gas/
    * config/tc-arm.c (do_neon_ldx_stx): Added
    validation for vector load/store insns.

    gas/testsuite/
    * gas/arm/neon-addressing-bad.d: New test case.
    * gas/arm/neon-addressing-bad.s: New file.
    * gas/arm/neon-addressing-bad.l: New file.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 4622709b0c39c8ab6ebf4f1c8577ec46877db005..f10e7d31fd0b30123264f9bb108f42488c7a0286 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2010-01-04  Daniel Gutson  <dgutson@codesourcery.com>
+
+       * config/tc-arm.c (do_neon_ldx_stx): Added
+       validation for vector load/store insns.
+
 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 
        * config/tc-ppc.c (md_show_usage): Document -me500mc64.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 3e0ef5536455aac4813b5ee86eb2dfb4859ddeca..b599725f7c4152512ee8e2c299b647a9f1e2448a 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -14810,6 +14810,9 @@ do_neon_ld_dup (void)
 static void
 do_neon_ldx_stx (void)
 {
+  if (inst.operands[1].isreg)
+    constraint (inst.operands[1].reg == REG_PC, BAD_PC);
+
   switch (NEON_LANE (inst.operands[0].imm))
     {
     case NEON_INTERLEAVE_LANES:

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0b42625a3a77f2348c16af72d24733359e735d42..df09e155880b3506001974066a6e5804de5f6d75 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2010-01-04  Daniel Gutson  <dgutson@codesourcery.com>
+
+       * gas/arm/neon-addressing-bad.d: New test case.
+       * gas/arm/neon-addressing-bad.s: New file.
+       * gas/arm/neon-addressing-bad.l: New file.
+
 2010-01-03  Daniel Gutson  <dgutson@codesourcery.com>
 
        * gas/arm/neon-suffix-bad.d: New test case.

diff --git a/gas/testsuite/gas/arm/neon-addressing-bad.d b/gas/testsuite/gas/arm/neon-addressing-bad.d
new file mode 100644 (file)
index 0000000..3e27426
--- /dev/null
+++ b/gas/testsuite/gas/arm/neon-addressing-bad.d
@@ -0,0 +1,3 @@
+# name: Bad operand in Advanced SIMD Neon instructions
+# as: -mfpu=neon
+# error-output: neon-addressing-bad.l

diff --git a/gas/testsuite/gas/arm/neon-addressing-bad.l b/gas/testsuite/gas/arm/neon-addressing-bad.l
new file mode 100644 (file)
index 0000000..360a891
--- /dev/null
+++ b/gas/testsuite/gas/arm/neon-addressing-bad.l
@@ -0,0 +1,19 @@
+[^:]*: Assembler messages:
+[^:]*:3: Error: r15 not allowed here -- `vld1.8 {d0},1f'
+[^:]*:5: Error: r15 not allowed here -- `vld1.8 {D0},R0'
+[^:]*:6: Error: r15 not allowed here -- `vld1.8 {Q1},R0'
+[^:]*:7: Error: r15 not allowed here -- `vld1.8 {D0},\[PC\]'
+[^:]*:8: Error: r15 not allowed here -- `vld1.8 {D0},\[PC,#0\]'
+[^:]*:9: Error: r15 not allowed here -- `vst1.8 {D0},R0'
+[^:]*:10: Error: r15 not allowed here -- `vst1.8 {Q1},R0'
+[^:]*:11: Error: r15 not allowed here -- `vst1.8 {D0},\[PC\]'
+[^:]*:12: Error: r15 not allowed here -- `vst1.8 {D0},\[PC,#0\]'
+[^:]*:14: Error: r15 not allowed here -- `vld1.8 {d0},2f'
+[^:]*:16: Error: r15 not allowed here -- `vld1.8 {D0},R0'
+[^:]*:17: Error: r15 not allowed here -- `vld1.8 {Q1},R0'
+[^:]*:18: Error: r15 not allowed here -- `vld1.8 {D0},\[PC\]'
+[^:]*:19: Error: r15 not allowed here -- `vld1.8 {D0},\[PC,#0\]'
+[^:]*:20: Error: r15 not allowed here -- `vst1.8 {D0},R0'
+[^:]*:21: Error: r15 not allowed here -- `vst1.8 {Q1},R0'
+[^:]*:22: Error: r15 not allowed here -- `vst1.8 {D0},\[PC\]'
+[^:]*:23: Error: r15 not allowed here -- `vst1.8 {D0},\[PC,#0\]'

diff --git a/gas/testsuite/gas/arm/neon-addressing-bad.s b/gas/testsuite/gas/arm/neon-addressing-bad.s
new file mode 100644 (file)
index 0000000..c134ead
--- /dev/null
+++ b/gas/testsuite/gas/arm/neon-addressing-bad.s
@@ -0,0 +1,23 @@
+.syntax unified
+
+VLD1.8 {d0}, 1f
+1:
+VLD1.8 {D0}, R0
+VLD1.8 {Q1}, R0
+VLD1.8 {D0}, [PC]
+VLD1.8 {D0}, [PC, #0]
+VST1.8 {D0}, R0
+VST1.8 {Q1}, R0
+VST1.8 {D0}, [PC]
+VST1.8 {D0}, [PC, #0]
+.thumb
+VLD1.8 {d0}, 2f
+2:
+VLD1.8 {D0}, R0
+VLD1.8 {Q1}, R0
+VLD1.8 {D0}, [PC]
+VLD1.8 {D0}, [PC, #0]
+VST1.8 {D0}, R0
+VST1.8 {Q1}, R0
+VST1.8 {D0}, [PC]
+VST1.8 {D0}, [PC, #0]