.*:41: Error: opcode not supported on this processor.*
.*:42: Error: opcode not supported on this processor.*
.*:43: Error: opcode not supported on this processor.*
-.*:45: Error: expression out of range
-.*:46: Error: expression out of range
-.*:47: Error: register value used as expression
+.*:45: Error: illegal operands `dmfc2 \$2,0x10000'
+.*:46: Error: illegal operands `dmtc2 \$2,0x12345'
+.*:47: Error: illegal operands `dmfc2 \$9,\$12'
.*:48: Error: illegal operands `dmfc2 \$4,\$15,4'
-.*:49: Error: register value used as expression
+.*:49: Error: illegal operands `dmtc2 \$16,\$8'
.*:50: Error: illegal operands `dmtc2 \$22,\$7,\$4'
.*:52: Error: Improper size \(32\)
.*:54: Error: Improper position \(32\)
{"bc2tl", "N,p", 0x49030000, 0xffe30000, CBL|RD_CC, 0, I32 },
{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I1 },
{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, 0, I1 },
+{"dmfc2", "t,i", 0x48200000, 0xffe00000, LCD|WR_t|RD_C2, 0, IOCT },
{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I3 },
{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I64 },
-{"dmfc2", "t,i", 0x48200000, 0xffe00000, LCD|WR_t|RD_C2, 0, IOCT },
+{"dmtc2", "t,i", 0x48a00000, 0xffe00000, COD|RD_t|WR_C2|WR_CC, 0, IOCT },
{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, 0, I3 },
{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, 0, I64 },
-{"dmtc2", "t,i", 0x48a00000, 0xffe00000, COD|RD_t|WR_C2|WR_CC, 0, IOCT },
{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I1 },
{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I32 },
{"mfhc2", "t,G", 0x48600000, 0xffe007ff, LCD|WR_t|RD_C2, 0, I33 },