microwatt-verilator: Clarified the snapshot files

diff --git a/HDL_workflow/microwatt_tutorial.mdwn b/HDL_workflow/microwatt_tutorial.mdwn
index 06dc1d03ec25c4bd858dccbb27bd91817f2f1d85..a15fade6d7e0fb332b315eed853b507f00524df1 100644 (file)
--- a/HDL_workflow/microwatt_tutorial.mdwn
+++ b/HDL_workflow/microwatt_tutorial.mdwn
@@ -152,10 +152,14 @@ The following files will be generated during the sim:
 hangs without any printing, view this file, as the processor may have hit an
 exception etc. Grows in size as the sim runs.
 
-- `bram.snapshot.[NUMBER]` - Snapshot files of the contents of bram, can be
-used to resume the simulation. The number on the end corresponds to the tick
-time (i.e. 'bram.snapshot.1999990'). Pass the tick number on the end of the
-filename with the '-s' flag:
+- `bram.snapshot.[NUMBER]`, `verilator.save.[NUMBER]` - Snapshot files of the
+contents of bram and verilator model respectively. Can be used to resume the
+simulation. The number on the end corresponds to the tick time (i.e.
+`bram.snapshot.1999990`/`verilator.save.1999990`). First the verilator model is
+loaded, and then the bram contents are loaded. See lines `#65-108` and
+`#189-195` of the 
+[microwatt-verilator.cpp file](https://git.libre-soc.org/?p=microwatt.git;a=blob;f=verilator/microwatt-verilator.cpp;h=a226393f6ba74d5e3e1ffdb729d731d2311d53ad;hb=refs/heads/verilator_trace).
+Pass the tick number on the end of the filename with the '-s' flag:
 
     (microwatt):$ time ./microwatt-verilator hello_world/hello_world.bin -s 1999990
 
@@ -167,9 +171,6 @@ You'll get a message like this:
 
 These snapshots are generated at intervals of every 2,000,000 ticks.
 
-- `verilator.save.[NUMBER]` - (TODO: Need to check) - Verilator model snapshot
-files.
-
 - `microwatt-verilator.vcd` - (TODO: Need to check) - GTKWave waveform file,
 allowing you to look at processor signals and transitions during simulation.
 *Needs to be converted to fst file first*: