Cleanup ecp5 boxes

diff --git a/techlibs/ecp5/abc9_5g.box b/techlibs/ecp5/abc9_5g.box
index 2bc945a54fa7718bf4d359a7ca08b40da065981c..5c7f52ab1190ceac0143bed7b590b1b38343a80a 100644 (file)
--- a/techlibs/ecp5/abc9_5g.box
+++ b/techlibs/ecp5/abc9_5g.box
@@ -1,43 +1,36 @@
-# NB: Inputs/Outputs must be ordered alphabetically
-#     (with exceptions for carry in/out)
+# NB: Box inputs/outputs must each be in the same order
+#     as their corresponding module definition
+#     (with exceptions detailed below)
 
 # Box 1 : CCU2C (2xCARRY + 2xLUT4)
-# Outputs: S0, S1, COUT
-#   (NB: carry chain input/output must be last
-#        input/output and bus has been moved
-#        there overriding the otherwise
+#   (Exception: carry chain input/output must be the
+#        last input and output and the entire bus has been
+#        moved there overriding the otherwise
 #        alphabetical ordering)
 # name  ID   w/b   ins    outs
 CCU2C   1      1   9      3
-
-#A0   A1   B0   B1   C0    C1  D0   D1   CIN
-379  -    379  -    275   -    141  -    257
-630  379  630  379  526   275  392  141  273
-516  516  516  516  412   412  278  278  43
+#A0  B0   C0    D0   A1   B1   C1   D1   CIN
+379  379  275   141  -    -    -    -    257 # S0
+630  630  526   392  379  379  275  141  273 # S1
+516  516  412   278  516  516  412  278   43 # COUT
 
 # Box 2 : TRELLIS_DPR16X4_COMB (16x4 dist ram)
-# Outputs: DO0, DO1, DO2, DO3
 # name               ID  w/b   ins   outs
 $__ABC9_DPR16X4_COMB  2     0   8    4
-
-#A0   A1   A2   A3   RAD0   RAD1   RAD2   RAD3
-0     0    0    0    141    379    275    379
-0     0    0    0    141    379    275    379
-0     0    0    0    141    379    275    379
-0     0    0    0    141    379    275    379
+#$D0  $D1  $D2  $D3  RAD0   RAD1   RAD2   RAD3
+0     0    0    0    141    379    275    379 # DO0
+0     0    0    0    141    379    275    379 # DO1
+0     0    0    0    141    379    275    379 # DO2
+0     0    0    0    141    379    275    379 # DO3
 
 # Box 3 : PFUMX (MUX2)
-# Outputs: Z
 # name  ID   w/b   ins    outs
 PFUMX   3    1     3      1
-
 #ALUT  BLUT  C0
-98     98    151
+98     98    151 # Z
 
 # Box 4 : L6MUX21 (MUX2)
-# Outputs: Z
 # name   ID   w/b   ins    outs
 L6MUX21  4    1     3      1
-
 #D0    D1    SD
-140    141   148
+140    141   148 # Z

diff --git a/techlibs/ecp5/abc9_map.v b/techlibs/ecp5/abc9_map.v
index d8d70f9f6bf9acc511a12ee12b15322d2ae4c138..113a35b9194ed5bedad11d96d5a7c6262e9858c6 100644 (file)
--- a/techlibs/ecp5/abc9_map.v
+++ b/techlibs/ecp5/abc9_map.v
@@ -1,24 +1,27 @@
 // ---------------------------------------
 
+// Attach a (combinatorial) black-box onto the output
+//   of this LUTRAM primitive to capture its
+//   asynchronous read behaviour
 module TRELLIS_DPR16X4 (
-       input  [3:0] DI,
-       input  [3:0] WAD,
-       input        WRE,
-       input        WCK,
-       input  [3:0] RAD,
+       (* techmap_autopurge *) input  [3:0] DI,
+       (* techmap_autopurge *) input  [3:0] WAD,
+       (* techmap_autopurge *) input        WRE,
+       (* techmap_autopurge *) input        WCK,
+       (* techmap_autopurge *) input  [3:0] RAD,
        output [3:0] DO
 );
        parameter WCKMUX = "WCK";
        parameter WREMUX = "WRE";
        parameter [63:0] INITVAL = 64'h0000000000000000;
-    wire [3:0] \$DO ;
+    wire [3:0] $DO;
 
     TRELLIS_DPR16X4 #(
       .WCKMUX(WCKMUX), .WREMUX(WREMUX), .INITVAL(INITVAL)
     ) _TECHMAP_REPLACE_ (
       .DI(DI), .WAD(WAD), .WRE(WRE), .WCK(WCK),
-      .RAD(RAD), .DO(\$DO )
+      .RAD(RAD), .DO($DO)
     );
 
-    \$__ABC9_DPR16X4_COMB do (.A(\$DO ), .S(RAD), .Y(DO));
+    $__ABC9_DPR16X4_COMB do (.$DO($DO), .RAD(RAD), .DO(DO));
 endmodule

diff --git a/techlibs/ecp5/abc9_model.v b/techlibs/ecp5/abc9_model.v
index 1dc8b561776c5e34ed96f6ee94731227b7013db6..81e5cd070e8a07de642b4fe8ddf4884232a026ef 100644 (file)
--- a/techlibs/ecp5/abc9_model.v
+++ b/techlibs/ecp5/abc9_model.v
@@ -1,5 +1,5 @@
 // ---------------------------------------
 
 (* abc9_box_id=2 *)
-module \$__ABC9_DPR16X4_COMB (input [3:0] A, S, output [3:0] Y);
+module \$__ABC9_DPR16X4_COMB (input [3:0] $DO, RAD, output [3:0] DO);
 endmodule

diff --git a/techlibs/ecp5/abc9_unmap.v b/techlibs/ecp5/abc9_unmap.v
index 9ae143c467b192fb716b035b1cf8ffff66dce336..cbdffdaf16ecb62d043bda1caa43457464cb7190 100644 (file)
--- a/techlibs/ecp5/abc9_unmap.v
+++ b/techlibs/ecp5/abc9_unmap.v
@@ -1,5 +1,5 @@
 // ---------------------------------------
 
-module \$__ABC9_DPR16X4_COMB (input [3:0] A, S, output [3:0] Y);
-    assign Y = A;
+module \$__ABC9_DPR16X4_COMB (input [3:0] $DO, RAD, output [3:0] DO);
+    assign DO = $DO;
 endmodule