(no commit message)

diff --git a/nlnet_2023_svp64_riscv.mdwn b/nlnet_2023_svp64_riscv.mdwn
index 2d0172f42d8069736c5ea20b95da0b22fd7cc3d9..1939a6a98a1cafd3e49ef8952ff32f237c2ddc8d 100644 (file)
--- a/nlnet_2023_svp64_riscv.mdwn
+++ b/nlnet_2023_svp64_riscv.mdwn
@@ -65,6 +65,8 @@ EUR 100,000.
   Many of these were already written four years ago and need conversion
   to the new format used in Libre-SOC
   <https://git.libre-soc.org/?p=riscv-tests.git;a=shortlog;h=refs/heads/sv>
+* Documentation, demonstrations and Conference Papers. This is a big
+  project and is important to engage in outreach. 
 * Research and assessment of ARM7 and i486 (both on opencores.org)
   as to their feasibility for applying Simple-V Prefixing
 
@@ -88,6 +90,10 @@ continue to be rigorously applied.
 
 ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?
 
+The Libre-SoC has a full set of resources for Libre Project Management and development: mailing list, bugtracker, git repository and wiki - all listed here: https://libre-soc.org/
+
+
+
 # Extra info to be submitted
 
 # Questions Received date: TODO