add testloop.s
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 21 May 2021 13:39:46 +0000 (14:39 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 21 May 2021 13:39:46 +0000 (14:39 +0100)
src/test/basic_pypowersim/.gitignore [new file with mode: 0644]
src/test/basic_pypowersim/Makefile
src/test/basic_pypowersim/testloop.s [new file with mode: 0644]

diff --git a/src/test/basic_pypowersim/.gitignore b/src/test/basic_pypowersim/.gitignore
new file mode 100644 (file)
index 0000000..9cd5496
--- /dev/null
@@ -0,0 +1,3 @@
+*.bin
+*.elf
+*.o
index f3ddf216f60617e3b484d2b5de5d1d05538e424b..cff373893d2ae9f8acd7a4e2d2b696c147dad802 100644 (file)
@@ -11,7 +11,7 @@ sim: kernel.bin
 clean:
        rm *.o *.elf *.bin
 
-kernel.elf: test.o
+kernel.elf: testloop.o
        $(TOOLCHAIN)-ld $^ -EL -o $@ -T memmap
 
 kernel.bin: kernel.elf
diff --git a/src/test/basic_pypowersim/testloop.s b/src/test/basic_pypowersim/testloop.s
new file mode 100644 (file)
index 0000000..b027295
--- /dev/null
@@ -0,0 +1,5 @@
+addi 1, 0, 0
+addi 2, 0, 7
+mtspr 9, 2       /* set ctr to 7 */
+addi 1, 1, 5
+bc 16, 0, -0x4  /* bdnz to the addi above */