add SVE2

diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn
index e2db33379ff1ec41ec68868f5110f330d04732c7..a79c8c07c5d5b9378ed5e32329d166c5446ba845 100644 (file)
--- a/openpower/sv/comparison_table.mdwn
+++ b/openpower/sv/comparison_table.mdwn
@@ -5,6 +5,7 @@
 | SVP64| 5{1}              | Scalable{2}   | yes                    | yes{3}                  | no{4}                        | n/a{5}  | yes{6}                   | yes{7}                  | yes{8}                           | yes{9}                  |
 | VSX  | 700+              | PackedSIMD    | no                     | no                      | yes{10}                      | yes     | no                       | no                      | no                               | no                      |
 | NEON | ~250{11}          | PredicatedSIMD| yes                    | no                      | yes                          | yes     | no                       | no                      | no                               | no                      |
+| SVE2 | ~1000{12}         | HSCalable{13} | yes                    | no                      | yes                          | yes     | no                       | no                      | no                               | no                      |
 
 * {1}: plus EXT001 24-bit prefixing. See [[sv/svp64]]
 * {2}: A 2-Dimensional Scalable Vector ISA with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]
@@ -17,4 +18,7 @@
 * {9} Turns standard ops into a type of "cmp". See [[sv/svp64/appendix]]
 * {10} VSX's Vector Registers are mis-named: they are PackedSIMD.
 * {11} difficult to ascertain, see [NEON/VFP](https://developer.arm.com/documentation/den0018/a/NEON-and-VFP-Instruction-Summary/List-of-all-NEON-and-VFP-instructions).
-       critically depends on ARM Scalar instructions
+  Critically depends on ARM Scalar instructions
+* {12} difficult to exactly ascertain, see ARM Architecture Reference Manual Supplement, DDI 0584.  Critically depends on ARM Scalar instructions.
+* {13}: ARM states that the Scalability is a [Silicon-partner choice](https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/102340_0001_00_en_introduction-to-sve2.pdf?revision=aae96dd2-5334-4ad3-9a47-393086a20fea).
+  this "Scalability independence" is not entirely extended in full to the programmer although ARM requests developers to consider it so, in practice this does not happen.