opcodes: blackfin: decode all ASTAT bits

All ASTAT bits work in the hardware even though they aren't part of the
official Blackfin ISA.  So decode every ASTAT field to make the output
a bit nicer when working with hand generated opcodes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 39258803f57718ddbccd5a4467172b4138933e6c..5ffc5c9f48a1add7541dfe4afb2cbd79a2dccb70 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2010-09-22  Mike Frysinger  <vapier@gentoo.org>
+
+       * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
+
 2010-09-22  Robin Getz  <robin.getz@analog.com>
 
        * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject

diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index ef7c7b50859dbf767d5204d437fc69b99c2a2abe..f124f1403f597b5aa920c170ae076e47f584be2a 100644 (file)
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -1227,44 +1227,57 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
   int op   = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask);
   int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask);
 
+  const char *bitname = statbits (cbit);
+  if (decode_statbits[cbit] == REG_LASTREG)
+    {
+      /* All ASTAT bits except CC may be operated on in hardware, but may
+         not have a dedicated insn, so still decode "valid" insns.  */
+      static char bitnames[64];
+      if (cbit != 5)
+       sprintf (bitnames, "ASTAT[%i /* unused bit */]", cbit);
+      else
+       strcpy (bitnames, "CC /* ... Illegal register ... */");
+      bitname = bitnames;
+    }
+
   if (op == 0 && D == 0)
     {
       OUTS (outf, "CC = ");
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
     }
   else if (op == 1 && D == 0)
     {
       OUTS (outf, "CC |= ");
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
     }
   else if (op == 2 && D == 0)
     {
       OUTS (outf, "CC &= ");
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
     }
   else if (op == 3 && D == 0)
     {
       OUTS (outf, "CC ^= ");
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
     }
   else if (op == 0 && D == 1)
     {
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
       OUTS (outf, " = CC");
     }
   else if (op == 1 && D == 1)
     {
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
       OUTS (outf, " |= CC");
     }
   else if (op == 2 && D == 1)
     {
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
       OUTS (outf, " &= CC");
     }
   else if (op == 3 && D == 1)
     {
-      OUTS (outf, statbits (cbit));
+      OUTS (outf, bitname);
       OUTS (outf, " ^= CC");
     }
   else