re PR target/91704 ([X86] Codegen for _mm256_cmpgt_epi8 is affected by -funsigned...

	PR target/91704
	* config/i386/avxintrin.h (__v32qs): New typedef.
	* config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
	instead of __v32qi.

	* gcc.target/i386/pr91704.c: New test.

From-SVN: r275507

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 34b2f620b8a3119e258a3e8a3843f29d89d63d9d..fc56822af4d0932df674308b291f67719c261f2e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-09-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/91704
+       * config/i386/avxintrin.h (__v32qs): New typedef.
+       * config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
+       instead of __v32qi.
+
 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
        * doc/invoke.texi (Option Summary): Cover eBPF.

diff --git a/gcc/config/i386/avx2intrin.h b/gcc/config/i386/avx2intrin.h
index 7606efdbf79225454b2c8907a10ee205899ac8e6..372d77f84fe2b6b68a9cc2e6a4c849f48e1c6c00 100644 (file)
--- a/gcc/config/i386/avx2intrin.h
+++ b/gcc/config/i386/avx2intrin.h
@@ -258,7 +258,7 @@ extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_cmpgt_epi8 (__m256i __A, __m256i __B)
 {
-  return (__m256i) ((__v32qi)__A > (__v32qi)__B);
+  return (__m256i) ((__v32qs)__A > (__v32qs)__B);
 }
 
 extern __inline __m256i

diff --git a/gcc/config/i386/avxintrin.h b/gcc/config/i386/avxintrin.h
index c8f8d53c86fce5affac2eb1846f9d4abce6c4aa9..95a9e018a7e156cd7a89cc31bc95d8eba3fdd336 100644 (file)
--- a/gcc/config/i386/avxintrin.h
+++ b/gcc/config/i386/avxintrin.h
@@ -47,6 +47,7 @@ typedef unsigned int __v8su __attribute__ ((__vector_size__ (32)));
 typedef short __v16hi __attribute__ ((__vector_size__ (32)));
 typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32)));
 typedef char __v32qi __attribute__ ((__vector_size__ (32)));
+typedef signed char __v32qs __attribute__ ((__vector_size__ (32)));
 typedef unsigned char __v32qu __attribute__ ((__vector_size__ (32)));
 
 /* The Intel API is flexible enough that we must allow aliasing with other

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index faa487f51cd3263668099cc497e42dbf1052ee12..d1c448a3a078d2683830445a3b12b4420133ea05 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-09-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/91704
+       * gcc.target/i386/pr91704.c: New test.
+
 2019-09-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
        * gcc.dg/builtins-config.h: eBPF doesn't support C99 standard

diff --git a/gcc/testsuite/gcc.target/i386/pr91704.c b/gcc/testsuite/gcc.target/i386/pr91704.c
new file mode 100644 (file)
index 0000000..b996e24
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr91704.c
@@ -0,0 +1,14 @@
+/* PR target/91704 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -funsigned-char -mavx2 -mavx512f -masm=att" } */
+/* { dg-final { scan-assembler-times "\tvpcmpgtb\t%ymm" 1 } } */
+/* { dg-final { scan-assembler-not "\tvpsubusb\t" } } */
+/* { dg-final { scan-assembler-not "\tvpcmpeqb\t" } } */
+
+#include <x86intrin.h>
+
+__m256i
+foo (__m256i x, __m256i y)
+{
+  return _mm256_cmpgt_epi8 (x, y);
+}