gcc/
PR target/65161
* config/i386/i386.c (ix86_sched_reorder): Skip instruction
reordering for selective scheduling.
gcc/testsuite/
PR target/65161
* gcc.target/i386/pr65161.c: New test.
From-SVN: r221002
+2015-02-26 Yuri Rumyantsev <ysrumyan@gmail.com>
+
+ PR target/65161
+ * config/i386/i386.c (ix86_sched_reorder): Skip instruction
+ reordering for selective scheduling.
+
2015-02-26 Terry Guo <terry.guo@arm.com>
* config/arm/arm-cores.def (cortex-m7): Add flag FL_NO_VOLATILE_CE.
ready[n_ready - 1] = insn;
return issue_rate;
}
- if (clock_var != 0 && swap_top_of_ready_list (ready, n_ready))
+
+ /* Skip selective scheduling since HID is not populated in it. */
+ if (clock_var != 0
+ && !sel_sched_p ()
+ && swap_top_of_ready_list (ready, n_ready))
{
if (sched_verbose > 1)
fprintf (dump, ";;\tslm sched_reorder: swap %d and %d insns\n",
+2015-02-26 Yuri Rumyantsev <ysrumyan@gmail.com>
+
+ PR target/65161
+ * gcc.target/i386/pr65161.c: New test.
+
2015-02-26 Terry Guo <terry.guo@arm.com>
* gcc.target/arm/no-volatile-in-it.c: New test.
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O3 -fselective-scheduling2 -mtune=slm" } */
+
+extern char data_ch[];
+
+short
+foo ()
+{
+ int i;
+ short shortsum = 0;
+ for (i = 0; i < 16; i++)
+ shortsum += data_ch[i];
+ return shortsum;
+}