x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel mode

The operands don't allow disambiguating the insn in 64-bit mode, and
hence suffixes need to be emitted not just in AT&T mode. Achieve this
by re-using %LQ while dropping PCMPESTR_Fixup().

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 83f0d8cdfb99d022c77dfd56f31e63ffdf9f5b62..aead7cd63659bee878cae23a0e73dd01af324377 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/x86-64-avx-intel.d,
+       testsuite/gas/i386/x86-64-sse4_2-intel.d: Adjust expectations.
+
 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 
        * testsuite/gas/i386/movbe-suffix.d,

diff --git a/gas/testsuite/gas/i386/x86-64-avx-intel.d b/gas/testsuite/gas/i386/x86-64-avx-intel.d
index a6f1b58c780e24febfe15d90999431a3bd14651a..7eb281e291451bce807a87a5437264a47f75992e 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-avx-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-intel.d
@@ -781,11 +781,11 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 79 df 31 07       vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
 [      ]*[a-f0-9]+:    c4 e3 79 61 f4 07       vpcmpestri xmm6,xmm4,0x7
 [      ]*[a-f0-9]+:    c4 e3 79 61 31 07       vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
-[      ]*[a-f0-9]+:    c4 e3 f9 61 f4 07       vpcmpestri xmm6,xmm4,0x7
+[      ]*[a-f0-9]+:    c4 e3 f9 61 f4 07       vpcmpestriq xmm6,xmm4,0x7
 [      ]*[a-f0-9]+:    c4 e3 79 61 31 07       vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
 [      ]*[a-f0-9]+:    c4 e3 79 60 f4 07       vpcmpestrm xmm6,xmm4,0x7
 [      ]*[a-f0-9]+:    c4 e3 79 60 31 07       vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
-[      ]*[a-f0-9]+:    c4 e3 f9 60 f4 07       vpcmpestrm xmm6,xmm4,0x7
+[      ]*[a-f0-9]+:    c4 e3 f9 60 f4 07       vpcmpestrmq xmm6,xmm4,0x7
 [      ]*[a-f0-9]+:    c4 e3 79 60 31 07       vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
 [      ]*[a-f0-9]+:    c4 e3 79 63 f4 07       vpcmpistri xmm6,xmm4,0x7
 [      ]*[a-f0-9]+:    c4 e3 79 63 31 07       vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7

diff --git a/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d b/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
index 954644574ce2b501ba4b36169315459a3fe70fa2..4804a784985b5023f218455bca8b434bd40cbd86 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
@@ -25,11 +25,11 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 0f 38 37 c1          pcmpgtq xmm0,xmm1
 [      ]*[a-f0-9]+:    66 0f 3a 61 01 00       pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
 [      ]*[a-f0-9]+:    66 0f 3a 61 c1 00       pcmpestri xmm0,xmm1,0x0
-[      ]*[a-f0-9]+:    66 48 0f 3a 61 01 00    rex\.W pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
+[      ]*[a-f0-9]+:    66 48 0f 3a 61 01 00    pcmpestriq xmm0,XMMWORD PTR \[rcx\],0x0
 [      ]*[a-f0-9]+:    66 0f 3a 61 c1 00       pcmpestri xmm0,xmm1,0x0
 [      ]*[a-f0-9]+:    66 0f 3a 60 01 01       pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
 [      ]*[a-f0-9]+:    66 0f 3a 60 c1 01       pcmpestrm xmm0,xmm1,0x1
-[      ]*[a-f0-9]+:    66 48 0f 3a 60 01 01    rex\.W pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
+[      ]*[a-f0-9]+:    66 48 0f 3a 60 01 01    pcmpestrmq xmm0,XMMWORD PTR \[rcx\],0x1
 [      ]*[a-f0-9]+:    66 0f 3a 60 c1 01       pcmpestrm xmm0,xmm1,0x1
 [      ]*[a-f0-9]+:    66 0f 3a 63 01 02       pcmpistri xmm0,XMMWORD PTR \[rcx\],0x2
 [      ]*[a-f0-9]+:    66 0f 3a 63 c1 02       pcmpistri xmm0,xmm1,0x2

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ed46ed288fab613d65f4ea516e3a492434e3fcc5..cfce6b7050598b4a6c5a9d1c3661a03f9a16d150 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,17 @@
+2020-07-14  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (PCMPESTR_Fixup): Delete.
+       (dis386): Adjust "LQ" description.
+       (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
+       cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
+       PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
+       vpcmpestrm, and vpcmpestri.
+       (putop): Honor "cond" when handling LQ.
+       * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
+       vcvtsi2ss and vcvtusi2ss.
+       * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
+       vcvtsi2sd and vcvtusi2sd.
+
 2020-07-14  Jan Beulich  <jbeulich@suse.com>
 
        * i386-dis.c (VCMP_Fixup, VCMP): Delete.

diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 90d5be22c6f4e023c97b555dcf80dad5f83dc1ca..1929f2485dad24204dcf3a28460f2956e2c14eaa 100644 (file)
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -28,7 +28,7 @@
   /* PREFIX_EVEX_0F2A */
   {
     { Bad_Opcode },
-    { "vcvtsi2ss%LQ",  { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+    { "vcvtsi2ss{%LQ|}",       { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { Bad_Opcode },
     { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
   },
@@ -272,7 +272,7 @@
   /* PREFIX_EVEX_0F7B */
   {
     { Bad_Opcode },
-    { "vcvtusi2ss%LQ", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
+    { "vcvtusi2ss{%LQ|}",      { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
     { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
   },

diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index f7460efccd467ce7618f67f82e358c3e30051a80..2d92290b885bc71f62669a20e4d3bb350447ba92 100644 (file)
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -39,8 +39,8 @@
   },
   /* EVEX_W_0F2A_P_3 */
   {
-    { "vcvtsi2sd%LQ",  { XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtsi2sd%LQ",  { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+    { "vcvtsi2sd{%LQ|}",       { XMScalar, VexScalar, Ed }, 0 },
+    { "vcvtsi2sd{%LQ|}",       { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* EVEX_W_0F51_P_1 */
   {
@@ -245,8 +245,8 @@
   },
   /* EVEX_W_0F7B_P_3 */
   {
-    { "vcvtusi2sd%LQ", { XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtusi2sd%LQ", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
+    { "vcvtusi2sd{%LQ|}",      { XMScalar, VexScalar, Ed }, 0 },
+    { "vcvtusi2sd{%LQ|}",      { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* EVEX_W_0F7E_P_1 */
   {

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 9ad7d7b16b5f3b6d1ac63f97e1e600caabc511f2..5a0282b2698d492f123b4db6c4674828cca0a163 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -115,7 +115,6 @@ static void HLE_Fixup3 (int, int);
 static void CMPXCHG8B_Fixup (int, int);
 static void XMM_Fixup (int, int);
 static void FXSAVE_Fixup (int, int);
-static void PCMPESTR_Fixup (int, int);
 
 static void MOVSXD_Fixup (int, int);
 
@@ -2287,8 +2286,8 @@ struct dis386 {
    "XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
           register operands and no broadcast.
    "XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
-   "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory
-          operand or no operand at all in 64bit mode, or if suffix_always
+   "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
+          being false, or no operand at all in 64bit mode, or if suffix_always
           is true.
    "LB" => print "abs" in 64bit mode and behave as 'B' otherwise
    "LS" => print "abs" in 64bit mode and behave as 'S' otherwise
@@ -3703,9 +3702,9 @@ static const struct dis386 prefix_table[][4] = {
   /* PREFIX_0F2A */
   {
     { "cvtpi2ps", { XM, EMCq }, PREFIX_OPCODE },
-    { "cvtsi2ss%LQ", { XM, Edq }, PREFIX_OPCODE },
+    { "cvtsi2ss{%LQ|}", { XM, Edq }, PREFIX_OPCODE },
     { "cvtpi2pd", { XM, EMCq }, PREFIX_OPCODE },
-    { "cvtsi2sd%LQ", { XM, Edq }, 0 },
+    { "cvtsi2sd{%LQ|}", { XM, Edq }, 0 },
   },
 
   /* PREFIX_0F2B */
@@ -3966,13 +3965,13 @@ static const struct dis386 prefix_table[][4] = {
   /* PREFIX_0FAE_REG_4_MOD_0 */
   {
     { "xsave", { FXSAVE }, 0 },
-    { "ptwrite%LQ", { Edq }, 0 },
+    { "ptwrite{%LQ|}", { Edq }, 0 },
   },
 
   /* PREFIX_0FAE_REG_4_MOD_3 */
   {
     { Bad_Opcode },
-    { "ptwrite%LQ", { Edq }, 0 },
+    { "ptwrite{%LQ|}", { Edq }, 0 },
   },
 
   /* PREFIX_0FAE_REG_5_MOD_0 */
@@ -4592,14 +4591,14 @@ static const struct dis386 prefix_table[][4] = {
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "pcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+    { "pcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F3A61 */
   {
     { Bad_Opcode },
     { Bad_Opcode },
-    { "pcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+    { "pcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F3A62 */
@@ -4676,9 +4675,9 @@ static const struct dis386 prefix_table[][4] = {
   /* PREFIX_VEX_0F2A */
   {
     { Bad_Opcode },
-    { "vcvtsi2ss%LQ",  { XMScalar, VexScalar, Edq }, 0 },
+    { "vcvtsi2ss{%LQ|}",       { XMScalar, VexScalar, Edq }, 0 },
     { Bad_Opcode },
-    { "vcvtsi2sd%LQ",  { XMScalar, VexScalar, Edq }, 0 },
+    { "vcvtsi2sd{%LQ|}",       { XMScalar, VexScalar, Edq }, 0 },
   },
 
   /* PREFIX_VEX_0F2C */
@@ -9847,12 +9846,12 @@ static const struct dis386 vex_len_table[][2] = {
 
   /* VEX_LEN_0F3A60_P_2 */
   {
-    { "vpcmpestrm",    { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+    { "vpcmpestrm!%LQ",        { XM, EXx, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A61_P_2 */
   {
-    { "vpcmpestri",    { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+    { "vpcmpestri!%LQ",        { XM, EXx, Ib }, 0 },
   },
 
   /* VEX_LEN_0F3A62_P_2 */
@@ -13644,15 +13643,15 @@ putop (const char *in_template, int sizeflag)
            }
          else if (l == 1 && last[0] == 'L')
            {
-             if ((intel_syntax && need_modrm)
-                 || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
+             if (cond ? modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
+                      : address_mode != mode_64bit)
                break;
              if ((rex & REX_W))
                {
                  USED_REX (REX_W);
                  *obufp++ = 'q';
                }
-             else if((address_mode == mode_64bit && need_modrm)
+             else if((address_mode == mode_64bit && need_modrm && cond)
                      || (sizeflag & SUFFIX_ALWAYS))
                *obufp++ = intel_syntax? 'd' : 'l';
            }
@@ -16422,27 +16421,6 @@ FXSAVE_Fixup (int bytemode, int sizeflag)
   OP_M (bytemode, sizeflag);
 }
 
-static void
-PCMPESTR_Fixup (int bytemode, int sizeflag)
-{
-  /* Add proper suffix to "{,v}pcmpestr{i,m}".  */
-  if (!intel_syntax)
-    {
-      char *p = mnemonicendp;
-
-      USED_REX (REX_W);
-      if (rex & REX_W)
-       *p++ = 'q';
-      else if (sizeflag & SUFFIX_ALWAYS)
-       *p++ = 'l';
-
-      *p = '\0';
-      mnemonicendp = p;
-    }
-
-  OP_EX (bytemode, sizeflag);
-}
-
 /* Display the destination register operand for instructions with
    VEX. */