Change-Id: I1f78dce05a48a2e3adfaf027cd38ab55507b9611
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Cc: Giacomo Travaglini <giacomo.travaglini@arm.com>
Cc: Javier Setoain <javier.setoain@arm.com>
Cc: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15437
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
uint64_t stack, uint64_t tls)
{
ArmISA::copyRegs(ptc, ctc);
+
+ if (flags & TGT_CLONE_SETTLS) {
+ /* TPIDR_EL0 is architecturally mapped to TPIDRURW, so
+ * this works for both aarch32 and aarch64. */
+ ctc->setMiscReg(ArmISA::MISCREG_TPIDR_EL0, tls);
+ }
}
};