reg->num_components = 0;
reg->bit_size = 32;
reg->num_array_elems = 0;
- reg->is_packed = false;
reg->name = NULL;
exec_list_push_tail(list, ®->node);
/** whether this register is local (per-function) or global (per-shader) */
bool is_global;
- /**
- * If this flag is set to true, then accessing channels >= num_components
- * is well-defined, and simply spills over to the next array element. This
- * is useful for backends that can do per-component accessing, in
- * particular scalar backends. By setting this flag and making
- * num_components equal to 1, structures can be packed tightly into
- * registers and then registers can be accessed per-component to get to
- * each structure member, even if it crosses vec4 boundaries.
- */
- bool is_packed;
-
/** set of nir_srcs where this register is used (read from) */
struct list_head uses;
nreg->index = reg->index;
nreg->name = ralloc_strdup(nreg, reg->name);
nreg->is_global = reg->is_global;
- nreg->is_packed = reg->is_packed;
/* reconstructing uses/defs/if_uses handled by nir_instr_insert() */
list_inithead(&nreg->uses);
NIR_VLA(BITSET_WORD, defs, block_set_words);
nir_foreach_register(reg, &impl->registers) {
- if (reg->num_array_elems != 0 || reg->is_packed) {
+ if (reg->num_array_elems != 0) {
/* This pass only really works on "plain" registers. If it's a
* packed or array register, just set the value to NULL so that the
* rewrite portion of the pass will know to ignore it.
{
FILE *fp = state->fp;
fprintf(fp, "decl_reg %s %u ", sizes[reg->num_components], reg->bit_size);
- if (reg->is_packed)
- fprintf(fp, "(packed) ");
print_register(reg, state);
if (reg->num_array_elems != 0)
fprintf(fp, "[%u]", reg->num_array_elems);
blob_write_uint32(ctx->blob, !!(reg->name));
if (reg->name)
blob_write_string(ctx->blob, reg->name);
- blob_write_uint32(ctx->blob, reg->is_global << 1 | reg->is_packed);
+ blob_write_uint32(ctx->blob, reg->is_global << 1);
}
static nir_register *
}
unsigned flags = blob_read_uint32(ctx->blob);
reg->is_global = flags & 0x2;
- reg->is_packed = flags & 0x1;
list_inithead(®->uses);
list_inithead(®->defs);
"using a register declared in a different function");
}
- if (!src->reg.reg->is_packed) {
- if (bit_sizes)
- validate_assert(state, src->reg.reg->bit_size & bit_sizes);
- if (num_components)
- validate_assert(state, src->reg.reg->num_components == num_components);
- }
+ if (bit_sizes)
+ validate_assert(state, src->reg.reg->bit_size & bit_sizes);
+ if (num_components)
+ validate_assert(state, src->reg.reg->num_components == num_components);
validate_assert(state, (src->reg.reg->num_array_elems == 0 ||
src->reg.base_offset < src->reg.reg->num_array_elems) &&
nir_alu_src *src = &instr->src[index];
unsigned num_components = nir_src_num_components(src->src);
- if (!src->src.is_ssa && src->src.reg.reg->is_packed)
- num_components = NIR_MAX_VEC_COMPONENTS; /* can't check anything */
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
validate_assert(state, src->swizzle[i] < NIR_MAX_VEC_COMPONENTS);
"writing to a register declared in a different function");
}
- if (!dest->reg->is_packed) {
- if (bit_sizes)
- validate_assert(state, dest->reg->bit_size & bit_sizes);
- if (num_components)
- validate_assert(state, dest->reg->num_components == num_components);
- }
+ if (bit_sizes)
+ validate_assert(state, dest->reg->bit_size & bit_sizes);
+ if (num_components)
+ validate_assert(state, dest->reg->num_components == num_components);
validate_assert(state, (dest->reg->num_array_elems == 0 ||
dest->base_offset < dest->reg->num_array_elems) &&
nir_alu_dest *dest = &instr->dest;
unsigned dest_size = nir_dest_num_components(dest->dest);
- bool is_packed = !dest->dest.is_ssa && dest->dest.reg.reg->is_packed;
/*
* validate that the instruction doesn't write to components not in the
* register/SSA value
*/
- validate_assert(state, is_packed || !(dest->write_mask & ~((1 << dest_size) - 1)));
+ validate_assert(state, !(dest->write_mask & ~((1 << dest_size) - 1)));
/* validate that saturate is only ever used on instructions with
* destinations of type float