CHIPSET(0x29B2, Q35_G, "Intel(R) Q35")
CHIPSET(0x29C2, G33_G, "Intel(R) G33")
CHIPSET(0x29D2, Q33_G, "Intel(R) Q33")
-CHIPSET(0xA011, IGD_GM, "Intel(R) IGD")
-CHIPSET(0xA001, IGD_G, "Intel(R) IGD")
+CHIPSET(0xA011, PNV_GM, "Intel(R) Pineview M")
+CHIPSET(0xA001, PNV_G, "Intel(R) Pineview")
#define PCI_CHIP_G33_G 0x29C2
#define PCI_CHIP_Q33_G 0x29D2
-#define PCI_CHIP_IGD_GM 0xA011
-#define PCI_CHIP_IGD_G 0xA001
+#define PCI_CHIP_PNV_GM 0xA011
+#define PCI_CHIP_PNV_G 0xA001
-#define IS_IGDGM(devid) (devid == PCI_CHIP_IGD_GM)
-#define IS_IGDG(devid) (devid == PCI_CHIP_IGD_G)
-#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid))
+#define IS_PNVGM(devid) (devid == PCI_CHIP_PNV_GM)
+#define IS_PNVG(devid) (devid == PCI_CHIP_PNV_G)
+#define IS_PNV(devid) (IS_PNVG(devid) || IS_PNVGM(devid))
#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
devid == PCI_CHIP_I915_GM || \
devid == PCI_CHIP_I965_GM || \
devid == PCI_CHIP_I965_GME || \
devid == PCI_CHIP_GM45_GM || \
- IS_IGD(devid) || \
+ IS_PNV(devid) || \
devid == PCI_CHIP_ILM_G)
#define IS_915(devid) (devid == PCI_CHIP_I915_G || \
devid == PCI_CHIP_I945_GME || \
devid == PCI_CHIP_G33_G || \
devid == PCI_CHIP_Q33_G || \
- devid == PCI_CHIP_Q35_G || IS_IGD(devid))
+ devid == PCI_CHIP_Q35_G || IS_PNV(devid))
#define IS_9XX(devid) (IS_915(devid) || \
IS_945(devid))