i965: Add support for G41 chipset which is another 4 series.
authorXiang, Haihao <haihao.xiang@intel.com>
Fri, 12 Sep 2008 01:25:34 +0000 (09:25 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Fri, 12 Sep 2008 01:25:34 +0000 (09:25 +0800)
src/mesa/drivers/dri/intel/intel_chipset.h
src/mesa/drivers/dri/intel/intel_context.c

index 15b9ef431273ec5e8b0f7a7c01eab5094e6374be..170efd060aee9ad1fdae18aac6c4952558a7b464 100644 (file)
@@ -58,6 +58,7 @@
 #define PCI_CHIP_IGD_E_G                0x2E02
 #define PCI_CHIP_Q45_G                  0x2E12
 #define PCI_CHIP_G45_G                  0x2E22
+#define PCI_CHIP_G41_G                  0x2E32
 
 #define IS_MOBILE(devid)       (devid == PCI_CHIP_I855_GM || \
                                 devid == PCI_CHIP_I915_GM || \
@@ -70,7 +71,8 @@
 #define IS_GM45_GM(devid)       (devid == PCI_CHIP_GM45_GM)
 #define IS_G4X(devid)           (devid == PCI_CHIP_IGD_E_G || \
                                  devid == PCI_CHIP_Q45_G || \
-                                 devid == PCI_CHIP_G45_G)
+                                 devid == PCI_CHIP_G45_G || \
+                                 devid == PCI_CHIP_G41_G)
 
 #define IS_915(devid)          (devid == PCI_CHIP_I915_G || \
                                 devid == PCI_CHIP_E7221_G || \
index 4d1a742698c71507441fec421fa57b9f6fdeeb57..7065bb35ee8819c359b927eba7463906fcb7e969 100644 (file)
@@ -179,6 +179,9 @@ intelGetString(GLcontext * ctx, GLenum name)
       case PCI_CHIP_Q45_G:
          chipset = "Intel(R) Q45/Q43";
          break;
+      case PCI_CHIP_G41_G:
+         chipset = "Intel(R) G41";
+         break;
       default:
          chipset = "Unknown Intel Chipset";
          break;