break;
case sizeof(uint16_t):
switch (offset) {
+ case UDMAControl:
+ pkt->set<uint16_t>(udmaControl);
+ break;
case PrimaryTiming:
pkt->set<uint16_t>(primaryTiming);
break;
(uint32_t)pkt->get<uint16_t>());
break;
case sizeof(uint32_t):
- if (offset == IDEConfig)
+ switch (offset) {
+ case PrimaryTiming:
+ pkt->set<uint32_t>(primaryTiming);
+ break;
+ case IDEConfig:
pkt->set<uint32_t>(ideConfig);
- else
+ break;
+ default:
panic("No 32bit reads implemented for this device.");
+ }
DPRINTF(IdeCtrl, "PCI read offset: %#x size: 4 data: %#x\n", offset,
(uint32_t)pkt->get<uint32_t>());
break;
break;
case sizeof(uint16_t):
switch (offset) {
+ case UDMAControl:
+ udmaControl = pkt->get<uint16_t>();
+ break;
case PrimaryTiming:
primaryTiming = pkt->get<uint16_t>();
break;
offset, (uint32_t)pkt->get<uint16_t>());
break;
case sizeof(uint32_t):
- if (offset == IDEConfig)
+ switch (offset) {
+ case PrimaryTiming:
+ primaryTiming = pkt->get<uint32_t>();
+ break;
+ case IDEConfig:
ideConfig = pkt->get<uint32_t>();
- else
+ break;
+ default:
panic("Write of unimplemented PCI config. register: %x\n", offset);
+ }
break;
default:
panic("invalid access size(?) for PCI configspace!\n");