Move dsp_map.v into cells_map.v; cleanup synth_xilinx a little

diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc
index c41015e948c26f65b5911a0bac7d8855d0986abf..17c5df37d8c925deb06e2f0559fd5f08df8bda6d 100644 (file)
--- a/techlibs/xilinx/Makefile.inc
+++ b/techlibs/xilinx/Makefile.inc
@@ -31,7 +31,6 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))
 $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v))
 $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v))
 $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/mux_map.v))
-$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/dsp_map.v))
 
 $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box))
 $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut))

diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v
index 2eb9fa2c1bdda20f054c531bc0592d1764793d5c..6ebca0d544e56708cf1dd8ab0e84efaf506b2b59 100644 (file)
--- a/techlibs/xilinx/cells_map.v
+++ b/techlibs/xilinx/cells_map.v
@@ -365,3 +365,44 @@ module \$__XILINX_MUXF78 (O, I0, I1, I2, I3, S0, S1);
     MUXF8 mux8 (.I0(T0), .I1(T1), .S(S1), .O(O));
 endmodule
 `endif
+
+module \$__MUL25X18 (input [24:0] A, input [17:0] B, output [42:0] OUT);
+       wire [47:0] P_48;
+       DSP48E1 #(
+               // Disable all registers
+               .ACASCREG(0),
+               .ADREG(0),
+               .A_INPUT("DIRECT"),
+               .ALUMODEREG(0),
+               .AREG(0),
+               .BCASCREG(0),
+               .B_INPUT("DIRECT"),
+               .BREG(0),
+               .CARRYINREG(0),
+               .CARRYINSELREG(0),
+               .CREG(0),
+               .DREG(0),
+               .INMODEREG(0),
+               .MREG(0),
+               .OPMODEREG(0),
+               .PREG(0)
+       ) _TECHMAP_REPLACE_ (
+               //Data path
+               .A({5'b0, A}),
+               .B(B),
+               .C(48'b0),
+               .D(24'b0),
+               .P(P_48),
+
+               .INMODE(4'b0000),
+               .ALUMODE(4'b0000),
+               .OPMODE(7'b000101),
+               .CARRYINSEL(3'b000),
+
+               .ACIN(30'b0),
+               .BCIN(18'b0),
+               .PCIN(48'b0),
+               .CARRYIN(1'b0)
+       );
+       assign OUT = P_48;
+endmodule

diff --git a/techlibs/xilinx/dsp_map.v b/techlibs/xilinx/dsp_map.v
deleted file mode 100644 (file)
index 4faa204..0000000
--- a/techlibs/xilinx/dsp_map.v
+++ /dev/null
@@ -1,40 +0,0 @@
-module \$__MUL25X18 (input [24:0] A, input [17:0] B, output [42:0] OUT);
-       wire [47:0] P_48;
-       DSP48E1 #(
-               // Disable all registers
-               .ACASCREG(0),
-               .ADREG(0),
-               .A_INPUT("DIRECT"),
-               .ALUMODEREG(0),
-               .AREG(0),
-               .BCASCREG(0),
-               .B_INPUT("DIRECT"),
-               .BREG(0),
-               .CARRYINREG(0),
-               .CARRYINSELREG(0),
-               .CREG(0),
-               .DREG(0),
-               .INMODEREG(0),
-               .MREG(0),
-               .OPMODEREG(0),
-               .PREG(0)
-       ) _TECHMAP_REPLACE_ (
-               //Data path
-               .A({5'b0, A}),
-               .B(B),
-               .C(48'b0),
-               .D(24'b0),
-               .P(P_48),
-
-               .INMODE(4'b0000),
-               .ALUMODE(4'b0000),
-               .OPMODE(7'b000101),
-               .CARRYINSEL(3'b000),
-
-               .ACIN(30'b0),
-               .BCIN(18'b0),
-               .PCIN(48'b0),
-               .CARRYIN(1'b0)
-       );
-       assign OUT = P_48;
-endmodule

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 3da35db75801d5d6e38b6aad81bc84cee740d09b..9199fbb5323643ce4c232277e6d0d3854f9b01d8 100644 (file)
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -279,11 +279,8 @@ struct SynthXilinxPass : public ScriptPass
 
                        run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6");
 
-                       if (!nodsp || help_mode) {
+                       if (!nodsp || help_mode)
                                run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=25 -D DSP_B_MAXWIDTH=18 -D DSP_NAME=$__MUL25X18");
-                               run("clean");
-                               run("techmap -map +/xilinx/dsp_map.v");
-                       }
 
                        run("alumacc");
                        run("share");