ruby: rename template_hack to template

I don't like using the word hack. Hence, the patch.

diff --git a/src/mem/protocol/MESI_CMP_directory-L1cache.sm b/src/mem/protocol/MESI_CMP_directory-L1cache.sm
index 1316a0ed44fa1c9b3923ec94ad80f1597cf6b37b..d54f7e71c0a02a671796c0fa40c2a9ed22806fbb 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MESI_CMP_directory-L1cache.sm
@@ -126,7 +126,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
     bool isPresent(Address);
   }
 
-  TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
+  TBETable L1_TBEs, template="<L1Cache_TBE>";
 
   MessageBuffer mandatoryQueue, ordered="false";
 

diff --git a/src/mem/protocol/MESI_CMP_directory-L2cache.sm b/src/mem/protocol/MESI_CMP_directory-L2cache.sm
index 256f671f9ccf4d3afbd51280fb50c5706f50d9df..88053aeb876f0830fccf33119aa0302cee8ca4ec 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MESI_CMP_directory-L2cache.sm
@@ -151,7 +151,7 @@ machine(L2Cache, "MESI Directory L2 Cache CMP")
     bool isPresent(Address);
   }
 
-  TBETable L2_TBEs, template_hack="<L2Cache_TBE>";
+  TBETable L2_TBEs, template="<L2Cache_TBE>";
 
   void set_cache_entry(AbstractCacheEntry a);
   void unset_cache_entry();

diff --git a/src/mem/protocol/MESI_CMP_directory-dir.sm b/src/mem/protocol/MESI_CMP_directory-dir.sm
index aa1294b2c87074aa96d9d14212a68ca63e195e1c..7e1280337a4aeb784ebdd1afe2c0024c1223e014 100644 (file)
--- a/src/mem/protocol/MESI_CMP_directory-dir.sm
+++ b/src/mem/protocol/MESI_CMP_directory-dir.sm
@@ -105,7 +105,7 @@ machine(Directory, "MESI_CMP_filter_directory protocol")
 
   // ** OBJECTS **
 
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   void set_tbe(TBE tbe);
   void unset_tbe();

diff --git a/src/mem/protocol/MI_example-cache.sm b/src/mem/protocol/MI_example-cache.sm
index 89f8cbed164e1a3161a5892a292004c0c7c3480a..cf5cf9505385a189597b82001b39cb1e21cad4b6 100644 (file)
--- a/src/mem/protocol/MI_example-cache.sm
+++ b/src/mem/protocol/MI_example-cache.sm
@@ -98,7 +98,7 @@ machine(L1Cache, "MI Example L1 Cache")
 
 
   // STRUCTURES
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
 
   // PROTOTYPES
   void set_cache_entry(AbstractCacheEntry a);

diff --git a/src/mem/protocol/MI_example-dir.sm b/src/mem/protocol/MI_example-dir.sm
index 617d13ba9a6a95761ff427a82f1736450b71b7b5..241ad3b30e253dfc2e4f380326d9ee3412305ed7 100644 (file)
--- a/src/mem/protocol/MI_example-dir.sm
+++ b/src/mem/protocol/MI_example-dir.sm
@@ -102,7 +102,7 @@ machine(Directory, "Directory protocol")
   }
 
   // ** OBJECTS **
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   void set_tbe(TBE b);
   void unset_tbe();

diff --git a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
index 7a5cc65119890ebde64787f687636273dfa4d130..43c2def2ee8513dd64e5b7d288bb115664a100b9 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L1cache.sm
@@ -142,7 +142,7 @@ machine(L1Cache, "Directory protocol")
 
   MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
 
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
   TimerTable useTimerTable;
   int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
 

diff --git a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
index eb9693ed9ec808aa6033e48318db415030d0f1d6..6238953ad6e87a4b0c44ee4552c47882e0da8930 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm
@@ -225,8 +225,8 @@ machine(L2Cache, "Token protocol")
   }
 
 
-  TBETable TBEs, template_hack="<L2Cache_TBE>";
-  PerfectCacheMemory localDirectory, template_hack="<L2Cache_DirEntry>";
+  TBETable TBEs, template="<L2Cache_TBE>";
+  PerfectCacheMemory localDirectory, template="<L2Cache_DirEntry>";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();

diff --git a/src/mem/protocol/MOESI_CMP_directory-dir.sm b/src/mem/protocol/MOESI_CMP_directory-dir.sm
index 02e3d36353018b44f8afa82828621320bea10af9..1635267f602e2eaa1c1a1b0e12c97731a3346dbe 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dir.sm
@@ -119,7 +119,7 @@ machine(Directory, "Directory protocol")
   }
 
   // ** OBJECTS **
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   void set_tbe(TBE b);
   void unset_tbe();

diff --git a/src/mem/protocol/MOESI_CMP_directory-dma.sm b/src/mem/protocol/MOESI_CMP_directory-dma.sm
index 36b89056c179c69d81f5f76b4f794c3d4711bc71..e0a8a3eb58c6b0d7021d528bca856d94db7f8643 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_directory-dma.sm
+++ b/src/mem/protocol/MOESI_CMP_directory-dma.sm
@@ -44,7 +44,7 @@ machine(DMA, "DMA Controller")
 
   MessageBuffer mandatoryQueue, ordered="false";
   MessageBuffer triggerQueue, ordered="true";
-  TBETable TBEs, template_hack="<DMA_TBE>";
+  TBETable TBEs, template="<DMA_TBE>";
   State cur_state;
 
   void set_tbe(TBE b);

diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
index 7cc41cc20bec2184e35e7acece76b2ce6f9be649..b6de5a714fd9c5578e4c9d0401e4cfe1a66c5ee5 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -180,7 +180,7 @@ machine(L1Cache, "Token protocol")
   void wakeUpAllBuffers();
   void wakeUpBuffers(Address a);
 
-  TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
+  TBETable L1_TBEs, template="<L1Cache_TBE>";
 
   MessageBuffer mandatoryQueue, ordered="false", abstract_chip_ptr="true";
 

diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
index 078b5c7a6c4150f4c06e78d1aa23124eb2f52fb8..411390a5e9655a90d6444b58e795e0593632768a 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm
@@ -146,7 +146,7 @@ machine(L2Cache, "Token protocol")
   }
 
   PersistentTable persistentTable;
-  PerfectCacheMemory localDirectory, template_hack="<L2Cache_DirEntry>";
+  PerfectCacheMemory localDirectory, template="<L2Cache_DirEntry>";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();

diff --git a/src/mem/protocol/MOESI_CMP_token-dir.sm b/src/mem/protocol/MOESI_CMP_token-dir.sm
index 39e8a8d275a512aefc569d36b2f2d6eb63dd66d9..8d78be40cf6be3d7bf3686ec0065dec4d23a6d23 100644 (file)
--- a/src/mem/protocol/MOESI_CMP_token-dir.sm
+++ b/src/mem/protocol/MOESI_CMP_token-dir.sm
@@ -157,7 +157,7 @@ machine(Directory, "Token protocol")
   PersistentTable persistentTable;
   TimerTable reissueTimerTable;
 
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   bool starving, default="false";
   int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";

diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index 1fe353ce56ef8628236900d57716e7f903113cc5..6eb0974b06d0f2f2ff591cbad2ce7c838a203741 100644 (file)
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -173,7 +173,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
     bool isPresent(Address);
   }
 
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
 
   void set_cache_entry(AbstractCacheEntry b);
   void unset_cache_entry();

diff --git a/src/mem/protocol/MOESI_hammer-dir.sm b/src/mem/protocol/MOESI_hammer-dir.sm
index 1fc9463862aa3238a443921e98b5187f09833fdc..ed1fb7669d5c97b77574496c6653524de2332245 100644 (file)
--- a/src/mem/protocol/MOESI_hammer-dir.sm
+++ b/src/mem/protocol/MOESI_hammer-dir.sm
@@ -184,7 +184,7 @@ machine(Directory, "AMD Hammer-like protocol")
 
   Set fwd_set;
 
-  TBETable TBEs, template_hack="<Directory_TBE>";
+  TBETable TBEs, template="<Directory_TBE>";
 
   Entry getDirectoryEntry(Address addr), return_by_pointer="yes" {
     Entry dir_entry := static_cast(Entry, "pointer", directory[addr]);

diff --git a/src/mem/protocol/Network_test-cache.sm b/src/mem/protocol/Network_test-cache.sm
index d3b649e89b78880944ced0cf68254c9ef0b5f96a..64b156938145572d47bad0d3b091482f168d364f 100644 (file)
--- a/src/mem/protocol/Network_test-cache.sm
+++ b/src/mem/protocol/Network_test-cache.sm
@@ -82,7 +82,7 @@ machine(L1Cache, "Network_test L1 Cache")
 
   // STRUCTURES
 
-  TBETable TBEs, template_hack="<L1Cache_TBE>";
+  TBETable TBEs, template="<L1Cache_TBE>";
 
 
   // FUNCTIONS

diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 2b1e2a2b556af792bec6f89319b1982291b44426..bb69b70bf1b3bfd2d0ae2b47d96d764c29e3fc92 100644 (file)
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -385,7 +385,7 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr);
 // Objects
 ''')
         for var in self.objects:
-            th = var.get("template_hack", "")
+            th = var.get("template", "")
             code('${{var.type.c_ident}}$th* m_${{var.c_ident}}_ptr;')
 
             if var.type.ident == "MessageBuffer":
@@ -568,7 +568,7 @@ $c_ident::init()
                     if "factory" in var:
                         code('$vid = ${{var["factory"]}};')
                     elif var.ident.find("mandatoryQueue") < 0:
-                        th = var.get("template_hack", "")
+                        th = var.get("template", "")
                         expr = "%s  = new %s%s" % (vid, vtype.c_ident, th)
 
                         args = ""