i965/fs: Fix handling of sampler messages with header but zero offset

Gather unconditionally uses a header, but in some cases the
texture_offset value will be zero.

V2: Don't introduce a bogus conversion.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index fa15f7bac20d273012694d7fbc9b4e351cf5d117..ed6130433b01e5ddf049251c41a67fecbdddf3ae 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -539,9 +539,17 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
                  brw_imm_ud(inst->texture_offset));
       brw_pop_insn_state(p);
    } else if (inst->header_present) {
-      assert(brw->gen < 7);
-      /* Set up an implied move from g0 to the MRF. */
-      src = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW);
+      if (brw->gen >= 7) {
+         /* Explicitly set up the message header by copying g0 to the MRF. */
+         brw_push_insn_state(p);
+         brw_set_mask_control(p, BRW_MASK_DISABLE);
+         brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+         brw_MOV(p, src, brw_vec8_grf(0, 0));
+         brw_pop_insn_state(p);
+      } else {
+         /* Set up an implied move from g0 to the MRF. */
+         src = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW);
+      }
    }
 
    uint32_t surface_index = (inst->opcode == SHADER_OPCODE_TG4