+2020-10-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26685
+ * config/tc-i386.c (process_suffix): Also check the register
+ operand for the address size prefix if the memory operand has
+ no real registers.
+ * testsuite/gas/i386/enqcmd-16bit.d: New file.
+ * testsuite/gas/i386/enqcmd-16bit.s: Likewise.
+ * testsuite/gas/i386/movdir-16bit.d: Likewise.
+ * testsuite/gas/i386/movdir-16bit.s: Likewise.
+ * testsuite/gas/i386/enqcmd.s: Add tests with symbol and DISP.
+ * testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.s: Likewise.
+ * testsuite/gas/i386/movdir.s: Add tests with symbol and DISP.
+ Remove the .code16 test.
+ * testsuite/gas/i386/i386.exp: Run movdir-16bit and enqcmd-16bit.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+ * testsuite/gas/i386/enqcmd-intel.d: Likewise.
+ * testsuite/gas/i386/enqcmd.d: Likewise.
+ * testsuite/gas/i386/movdir-intel.d: Likewise.
+ * testsuite/gas/i386/movdir.d: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-movdir.d: Likewise.
+
2020-10-02 Nick Clifton <nickc@redhat.com>
* testsuite/gas/arm/mve-vcvtne-it.d: Allow for padding inserted by
enum { need_word, need_dword, need_qword } need;
/* Check the register operand for the address size prefix if
- the memory operand is symbol(%rip). */
+ the memory operand has no real registers, like symbol, DISP
+ or symbol(%rip). */
if (i.mem_operands == 1
&& i.reg_operands == 1
&& i.operands == 2
- && i.base_reg
- && i.base_reg->reg_num == RegIP
- && i.base_reg->reg_type.bitfield.qword
&& i.types[1].bitfield.class == Reg
- && i.op[1].regs->reg_type.bitfield.dword
+ && (flag_code == CODE_32BIT
+ ? i.op[1].regs->reg_type.bitfield.word
+ : i.op[1].regs->reg_type.bitfield.dword)
+ && ((i.base_reg == NULL && i.index_reg == NULL)
+ || (i.base_reg
+ && i.base_reg->reg_num == RegIP
+ && i.base_reg->reg_type.bitfield.qword))
&& !add_prefix (ADDR_PREFIX_OPCODE))
return 0;
--- /dev/null
+#as: -I${srcdir}/$subdir
+#objdump: -dw -Mi8086
+#name: i386 16-bit ENQCMD[S] insns
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+#pass
--- /dev/null
+# Check ENQCMD[S] 16-bit instructions
+
+ .code16
+.include "movdir.s"
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds ax,\[si\]
+0+ <_start>:
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd ax,\[si\]
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds ax,\[si\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd cx,ds:0x0
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd cx,ds:0x1234
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds cx,ds:0x0
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds cx,ds:0x1234
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd ax,\[si\]
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds eax,\[ecx\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds ax,\[si\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd cx,ds:0x0
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd cx,ds:0x1234
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds cx,ds:0x0
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds cx,ds:0x1234
#pass
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*f2 0f 38 f8 01[ ]*enqcmd \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f2 0f 38 f8 04[ ]*enqcmd \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*f3 0f 38 f8 01[ ]*enqcmds \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 f3 0f 38 f8 04[ ]*enqcmds \(%si\),%ax
+0+ <_start>:
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd \(%si\),%ax
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds \(%si\),%ax
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd 0x0,%cx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd 0x1234,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds 0x0,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds 0x1234,%cx
+ +[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+ +[a-f0-9]+: 67 f2 0f 38 f8 04 enqcmd \(%si\),%ax
+ +[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%ecx\),%eax
+ +[a-f0-9]+: 67 f3 0f 38 f8 04 enqcmds \(%si\),%ax
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 00 00 enqcmd 0x0,%cx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0e 34 12 enqcmd 0x1234,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 00 00 enqcmds 0x0,%cx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0e 34 12 enqcmds 0x1234,%cx
#pass
enqcmd (%si),%ax
enqcmds (%ecx),%eax
enqcmds (%si),%ax
+ enqcmd foo, %cx
+ enqcmd 0x1234, %cx
+ enqcmds foo, %cx
+ enqcmds 0x1234, %cx
.intel_syntax noprefix
enqcmd eax,[ecx]
enqcmd ax,[si]
enqcmds eax,[ecx]
enqcmds ax,[si]
+ enqcmd cx,ds:foo
+ enqcmd cx,ds:0x1234
+ enqcmds cx,ds:foo
+ enqcmds cx,ds:0x1234
run_dump_test "cldemote-intel"
run_dump_test "movdir"
run_dump_test "movdir-intel"
+ run_dump_test "movdir-16bit"
run_list_test "movdir64b-reg"
run_dump_test "enqcmd"
run_dump_test "enqcmd-intel"
+ run_dump_test "enqcmd-16bit"
run_list_test "enqcmd-inval"
run_dump_test "serialize"
run_dump_test "tdx"
--- /dev/null
+#as: -I${srcdir}/$subdir
+#objdump: -dw -Mi8086
+#name: i386 16-bit MOVDIR[I,64B] insns
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 67 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+#pass
--- /dev/null
+# Check MOVDIR[I,64B] 16-bit instructions
+
+ .code16
+.include "movdir.s"
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b eax,\[ecx\]
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b ax,\[si\]
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri DWORD PTR \[bx\+di\],eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b ax,\[bx\+di\]
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 67[ ]*movdir64b eax,\[edi\+eiz\*2\]
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri DWORD PTR \[ecx\],eax
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri DWORD PTR \[bx\+di\],eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b ax,\[bx\+di\]
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 90[ ]*movdir64b eax,\[eax\+edx\*4\]
+0+ <_start>:
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b ax,\[si\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b cx,ds:0x0
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b cx,ds:0x1234
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
+ +[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[ecx\],eax
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b eax,\[ecx\]
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b ax,\[si\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b cx,ds:0x0
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b cx,ds:0x1234
#pass
Disassembly of section \.text:
-00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 04[ ]*movdir64b \(%si\),%ax
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri %eax,\(%bx,%di\)
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%bx,%di\),%ax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 67[ ]*movdir64b \(%edi,%eiz,2\),%eax
-[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*67 0f 38 f9 01[ ]*movdiri %eax,\(%bx,%di\)
-[ ]*[a-f0-9]+:[ ]*67 66 0f 38 f8 01[ ]*movdir64b \(%bx,%di\),%ax
-[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 04 90[ ]*movdir64b \(%eax,%edx,4\),%eax
+0+ <_start>:
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%ecx\)
+ +[a-f0-9]+: 66 0f 38 f8 01 movdir64b \(%ecx\),%eax
+ +[a-f0-9]+: 67 66 0f 38 f8 04 movdir64b \(%si\),%ax
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 00 00 movdir64b 0x0,%cx
+ +[a-f0-9]+: 67 66 0f 38 f8 0e 34 12 movdir64b 0x1234,%cx
#pass
.allow_index_reg
.text
_start:
- .rept 2
movdiri %eax, (%ecx)
movdir64b (%ecx),%eax
movdir64b (%si),%ax
+ movdir64b foo, %cx
+ movdir64b 0x1234, %cx
.intel_syntax noprefix
movdiri [ecx], eax
movdiri dword ptr [ecx], eax
movdir64b eax,[ecx]
movdir64b ax,[si]
-
- .att_syntax prefix
- .code16
- .endr
-
- nop
+ movdir64b cx,ds:foo
+ movdir64b cx,ds:0x1234
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds ecx,\[eiz\*1\+0x12345678\]
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd rax,\[rcx\]
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd eax,\[ecx\]
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds rax,\[rcx\]
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd ecx,\[eiz\*1\+0x12345678\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds ecx,\[eiz\*1\+0x12345678\]
#pass
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: f2 0f 38 f8 01 enqcmd \(%rcx\),%rax
+[a-f0-9]+: 67 f2 0f 38 f8 01 enqcmd \(%ecx\),%eax
+[a-f0-9]+: f3 0f 38 f8 01 enqcmds \(%rcx\),%rax
+[a-f0-9]+: f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 f3 0f 38 f8 0d 00 00 00 00 enqcmds 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 00 00 00 00 enqcmd 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f2 0f 38 f8 0c 25 78 56 34 12 enqcmd 0x12345678\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 00 00 00 00 enqcmds 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 f3 0f 38 f8 0c 25 78 56 34 12 enqcmds 0x12345678\(,%eiz,1\),%ecx
#pass
enqcmds foo(%rip),%rcx
enqcmds foo(%rip),%ecx
enqcmds foo(%eip),%ecx
+ enqcmd foo, %ecx
+ enqcmd 0x12345678, %ecx
+ enqcmds foo, %ecx
+ enqcmds 0x12345678, %ecx
.intel_syntax noprefix
enqcmd rax,[rcx]
enqcmds rcx,[rip+foo]
enqcmds ecx,[rip+foo]
enqcmds ecx,[eip+foo]
+ enqcmd ecx,ds:foo
+ enqcmd ecx,ds:0x12345678
+ enqcmds ecx,ds:foo
+ enqcmds ecx,ds:0x12345678
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
+[a-f0-9]+: 48 0f 38 f9 01 movdiri QWORD PTR \[rcx\],rax
+[a-f0-9]+: 0f 38 f9 01 movdiri DWORD PTR \[rcx\],eax
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b rcx,\[rip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b ecx,\[eip\+0x0\] #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b ecx,\[eiz\*1\+0x0\]
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b ecx,\[eiz\*1\+0x12345678\]
#pass
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
+[a-f0-9]+: 48 0f 38 f9 01 movdiri %rax,\(%rcx\)
+[a-f0-9]+: 0f 38 f9 01 movdiri %eax,\(%rcx\)
+[a-f0-9]+: 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%rip\),%rcx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+[a-f0-9]+: 67 66 0f 38 f8 0d 00 00 00 00 movdir64b 0x0\(%eip\),%ecx #.*
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 00 00 00 00 movdir64b 0x0\(,%eiz,1\),%ecx
+ +[a-f0-9]+: 67 66 0f 38 f8 0c 25 78 56 34 12 movdir64b 0x12345678\(,%eiz,1\),%ecx
#pass
movdir64b foo(%rip),%rcx
movdir64b foo(%rip),%ecx
movdir64b foo(%eip),%ecx
+ movdir64b foo, %ecx
+ movdir64b 0x12345678, %ecx
.intel_syntax noprefix
movdiri [rcx],eax
movdir64b rcx,[rip+foo]
movdir64b ecx,[rip+foo]
movdir64b ecx,[eip+foo]
+ movdir64b ecx,ds:foo
+ movdir64b ecx,ds:0x12345678