projects
/
yosys.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
130d3b9
)
Move \init signal for non-port signals as long as internally driven
author
Eddie Hung
<eddie@fpgeh.com>
Thu, 28 Nov 2019 20:57:36 +0000
(12:57 -0800)
committer
Eddie Hung
<eddie@fpgeh.com>
Thu, 28 Nov 2019 20:57:36 +0000
(12:57 -0800)
passes/hierarchy/submod.cc
patch
|
blob
|
history
diff --git
a/passes/hierarchy/submod.cc
b/passes/hierarchy/submod.cc
index 839f8561cd418a407116c78cc0e5a9339f0c59a0..211f96175a50de9fef15e2c227a68785a4ce8f95 100644
(file)
--- a/
passes/hierarchy/submod.cc
+++ b/
passes/hierarchy/submod.cc
@@
-175,7
+175,7
@@
struct SubmodWorker
new_wire->port_output = new_wire_port_output;
new_wire->start_offset = wire->start_offset;
new_wire->attributes = wire->attributes;
- if (
new_wire->port_output
) {
+ if (
!flags.is_int_driven.is_fully_zero()
) {
new_wire->attributes.erase(ID(init));
auto sig = sigmap(wire);
for (int i = 0; i < GetSize(sig); i++) {