arch-arm: Implement ArmPMU DTB generation

This has been implemented by following Linux documentation:

Documentation/devicetree/bindings/arm/pmu.txt

Change-Id: I22583eed3792d5828f9c260e952ec5e8cf9e118b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35476
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

diff --git a/src/arch/arm/ArmPMU.py b/src/arch/arm/ArmPMU.py
index 047e908b3a29c6ad548dfbeb41655bee2e33ae8e..c712a97b6b8a08a1c146898fba5a1ca5f58262b0 100644 (file)
--- a/src/arch/arm/ArmPMU.py
+++ b/src/arch/arm/ArmPMU.py
@@ -39,7 +39,8 @@ from m5.SimObject import *
 from m5.params import *
 from m5.params import isNullPointer
 from m5.proxy import *
-from m5.objects.Gic import ArmInterruptPin
+from m5.objects.Gic import ArmInterruptPin, ArmPPI
+from m5.util.fdthelper import *
 
 class ProbeEvent(object):
     def __init__(self, pmu, _eventId, obj, *listOfNames):
@@ -168,6 +169,21 @@ class ArmPMU(SimObject):
         # 0x2F: L2D_TLB
         # 0x30: L2I_TLB
 
+    def generateDeviceTree(self, state):
+        # For simplicity we just support PPIs for DTB autogen otherwise
+        # it would be difficult to construct a ordered list of SPIs
+        assert isinstance(self.interrupt, ArmPPI)
+
+        node = FdtNode("pmu")
+        node.appendCompatible("arm,armv8-pmuv3")
+
+        gic = self.platform.unproxy(self).gic
+        node.append(
+            FdtPropertyWords("interrupts",
+                self.interrupt.generateFdtProperty(gic)))
+
+        yield node
+
     cycleEventId = Param.Int(ARCH_EVENT_CORE_CYCLES, "Cycle event id")
     platform = Param.Platform(Parent.any, "Platform this device is part of.")
     eventCounters = Param.Int(31, "Number of supported PMU counters")