+2017-05-11 Carl Love <cel@us.ibm.com>
+
+ * config/rs6000/rs6000-c: Add support for built-in functions
+ vector unsigned char vec_popcnt (vector signed char)
+ vector unsigned char vec_popcnt (vector unsigned char)
+ vector unsigned short vec_popcnt (vector signed short)
+ vector unsigned short vec_popcnt (vector unsigned short)
+ vector unsigned int vec_popcnt (vector signed int)
+ vector unsigned int vec_popcnt (vector unsigned int)
+ vector unsigned long long vec_popcnt (vector signed long long)
+ vector unsigned long long vec_popcnt (vector unsigned long long)
+ vector signed long long vec_slo (vector signed long long,
+ vector signed char)
+ vector signed long long vec_slo (vector signed long long,
+ vector unsigned char)
+ vector unsigned long long vec_slo (vector unsigned long long,
+ vector signed char)
+ vector unsigned long long vec_slo (vector unsigned long long,
+ vector unsigned char)
+ * config/rs6000/rs6000-builtin.def: Add definitions for VPOPCNTUB,
+ VPOPCNTUH, VPOPCNTUW, and VPOPCNTUD overloads.
+ * config/rs6000/altivec.h: Add define for vec_popcnt, vec_popcntb,
+ vec_popcnth, vec_popcntw and vec_popcntd built-in functions.
+ * doc/extend.texi: Update the built-in documentation file for the
+ new built-in functions.
+
2017-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>
* attribs.h (sorted_attr_string): Move machine independent
#define vec_vpopcntd __builtin_vec_vpopcntd
#define vec_vpopcnth __builtin_vec_vpopcnth
#define vec_vpopcntw __builtin_vec_vpopcntw
+#define vec_popcnt __builtin_vec_vpopcntu
+#define vec_popcntb __builtin_vec_vpopcntub
+#define vec_popcnth __builtin_vec_vpopcntuh
+#define vec_popcntw __builtin_vec_vpopcntuw
+#define vec_popcntd __builtin_vec_vpopcntud
#define vec_vrld __builtin_vec_vrld
#define vec_vsld __builtin_vec_vsld
#define vec_vsrad __builtin_vec_vsrad
BU_P8V_AV_1 (VPOPCNTH, "vpopcnth", CONST, popcountv8hi2)
BU_P8V_AV_1 (VPOPCNTW, "vpopcntw", CONST, popcountv4si2)
BU_P8V_AV_1 (VPOPCNTD, "vpopcntd", CONST, popcountv2di2)
+BU_P8V_AV_1 (VPOPCNTUB, "vpopcntub", CONST, popcountv16qi2)
+BU_P8V_AV_1 (VPOPCNTUH, "vpopcntuh", CONST, popcountv8hi2)
+BU_P8V_AV_1 (VPOPCNTUW, "vpopcntuw", CONST, popcountv4si2)
+BU_P8V_AV_1 (VPOPCNTUD, "vpopcntud", CONST, popcountv2di2)
BU_P8V_AV_1 (VGBBD, "vgbbd", CONST, p8v_vgbbd)
/* 2 argument altivec instructions added in ISA 2.07. */
BU_P8V_OVERLOAD_1 (VPOPCNTH, "vpopcnth")
BU_P8V_OVERLOAD_1 (VPOPCNTW, "vpopcntw")
BU_P8V_OVERLOAD_1 (VPOPCNTD, "vpopcntd")
+BU_P8V_OVERLOAD_1 (VPOPCNTU, "vpopcntu")
+BU_P8V_OVERLOAD_1 (VPOPCNTUB, "vpopcntub")
+BU_P8V_OVERLOAD_1 (VPOPCNTUH, "vpopcntuh")
+BU_P8V_OVERLOAD_1 (VPOPCNTUW, "vpopcntuw")
+BU_P8V_OVERLOAD_1 (VPOPCNTUD, "vpopcntud")
BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd")
/* ISA 2.07 vector overloaded 2 argument functions. */
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0 },
{ ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
+ { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_V16QI, 0 },
+ { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
+ RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
+ { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_V16QI, 0 },
+ { ALTIVEC_BUILTIN_VEC_SLO, ALTIVEC_BUILTIN_VSLO,
+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V16QI, 0 },
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_INTSI, 0 },
{ ALTIVEC_BUILTIN_VEC_SPLAT, ALTIVEC_BUILTIN_VSPLTB,
{ P8V_BUILTIN_VEC_VPOPCNTB, P8V_BUILTIN_VPOPCNTB,
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB,
+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_V16QI, 0, 0 },
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUB,
+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
+
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH,
+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_V8HI, 0, 0 },
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUH,
+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
+
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW,
+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_V4SI, 0, 0 },
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUW,
+ RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
+
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD,
+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_V2DI, 0, 0 },
+ { P8V_BUILTIN_VEC_VPOPCNTU, P8V_BUILTIN_VPOPCNTUD,
+ RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
+
{ P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
{ P8V_BUILTIN_VEC_VPOPCNTH, P8V_BUILTIN_VPOPCNTH,
vector unsigned char vec_slo (vector unsigned char, vector signed char);
vector unsigned char vec_slo (vector unsigned char,
vector unsigned char);
+vector signed long long vec_slo (vector signed long long, vector signed char);
+vector signed long long vec_slo (vector signed long long, vector unsigned char);
+vector unsigned long long vec_slo (vector unsigned long long, vector signed char);
+vector unsigned long long vec_slo (vector unsigned long long, vector unsigned char);
vector signed char vec_splat (vector signed char, const int);
vector unsigned char vec_splat (vector unsigned char, const int);
vector unsigned int vec_packsu (vector unsigned long long,
vector unsigned long long);
+vector unsigned char vec_popcnt (vector signed char);
+vector unsigned char vec_popcnt (vector unsigned char);
+vector unsigned short vec_popcnt (vector signed short);
+vector unsigned short vec_popcnt (vector unsigned short);
+vector unsigned int vec_popcnt (vector signed int);
+vector unsigned int vec_popcnt (vector unsigned int);
+vector unsigned long long vec_popcnt (vector signed long long);
+vector unsigned long long vec_popcnt (vector unsigned long long);
+
vector long long vec_rl (vector long long,
vector unsigned long long);
vector long long vec_rl (vector unsigned long long,
+gcc/testsuite/ChangeLog:
+
+2017-05-11 Carl Love <cel@us.ibm.com>
+
+ * gcc.target/powerpc/builtins-3-p8.c: Add tests for the new built-ins
+ to the test suite file.
+ * gcc.target/powerpc/builtins-3.c: Add tests for the new built-ins
+ to the test suite file.
+
2017-05-11 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR fortran/78659
return vec_neg (x);
}
+vector unsigned char
+test_unsigned_char_popcnt_signed_char (vector signed char x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned char
+test_unsigned_char_popcnt_unsigned_char (vector unsigned char x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned short
+test_unsigned_short_popcnt_signed_short (vector short x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned short
+test_unsigned_short_popcnt_unsigned_short (vector unsigned short x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned int
+test_unsigned_int_popcnt_signed_int (vector int x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned int
+test_unsigned_int_popcnt_unsigned_int (vector unsigned x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned long long
+test_unsigned_long_lont_popcnt_signed_long (vector long long x)
+{
+ return vec_popcnt (x);
+}
+
+vector unsigned long long
+test_unsigned_long_long_popcnt_unsigned_long (vector unsigned long long x)
+{
+ return vec_popcnt (x);
+}
+
/* Expected test results:
- test_eq_long_long 1 vcmpequd inst
- test_pack_float 1 vpkudum inst
- test_nabs_long_long 1 vspltisw, 1 vsubudm, 1 vminsd
- test_vsi_packs_vsll_vsll 1 vpksdss
- test_vui_packs_vull_vull 1 vpkudus
- test_neg_long_long 1 vspltisw, 1 vsubudm */
+ test_eq_long_long 1 vcmpequd inst
+ test_pack_float 1 vpkudum inst
+ test_nabs_long_long 1 vspltisw, 1 vsubudm, 1 vminsd
+ test_vsi_packs_vsll_vsll 1 vpksdss
+ test_vui_packs_vull_vull 1 vpkudus
+ test_neg_long_long 1 vspltisw, 1 vsubudm
+ test_eq_long_long 1 vcmpequd inst
+ test_pack_float 1 vpkudum inst
+ test_nabs_long_long 1 vspltisw, 1 vsubudm, 1 vminsd
+ test_neg_long_long 1 vspltisw, 1 vsubudm
+ test_unsigned_char_popcnt_signed_char 1 vpopcntb
+ test_unsigned_char_popcnt_unsigned_char 1 vpopcntb
+ test_unsigned_short_popcnt_signed_short 1 vpopcnth
+ test_unsigned_short_popcnt_unsigned_short 1 vpopcnth
+ test_unsigned_signed_popcnt_signed_int 1 vpopcntw
+ test_unsigned_signed_popcnt_unsigned_int 1 vpopcntw
+ test_unsigned_signed_popcnt_signed_long 1 vpopcntd
+ test_unsigned_signed_popcnt_unsigned_long 1 vpopcntd */
/* { dg-final { scan-assembler-times "vcmpequd" 1 } } */
/* { dg-final { scan-assembler-times "vpkudum" 1 } } */
/* { dg-final { scan-assembler-times "vminsd" 1 } } */
/* { dg-final { scan-assembler-times "vpksdss" 1 } } */
/* { dg-final { scan-assembler-times "vpkudus" 1 } } */
+/* { dg-final { scan-assembler-times "vpopcntb" 2 } } */
+/* { dg-final { scan-assembler-times "vpopcnth" 2 } } */
+/* { dg-final { scan-assembler-times "vpopcntw" 2 } } */
+/* { dg-final { scan-assembler-times "vpopcntd" 2 } } */
return vec_neg (x);
}
+vector signed long long
+test_vsll_slo_vsll_vsc (vector signed long long x, vector signed char y)
+{
+ return vec_slo (x, y);
+}
+
+vector signed long long
+test_vsll_slo_vsll_vuc (vector signed long long x, vector unsigned char y)
+{
+ return vec_slo (x, y);
+}
+
+vector unsigned long long
+test_vull_slo_vull_vsc (vector unsigned long long x, vector signed char y)
+{
+ return vec_slo (x, y);
+}
+
+vector unsigned long long
+test_vull_slo_vull_vuc (vector unsigned long long x, vector unsigned char y)
+{
+ return vec_slo (x, y);
+}
+
/* Expected test results:
test_eq_char 1 vcmpequb inst
test_neg_short 1 vspltisw, 1 vsubuhm
test_neg_int 1 vspltisw, 1 vsubuwm
test_neg_float 1 xvnegsp
- test_neg_float 1 xvnegdp */
+ test_neg_float 1 xvnegdp
+ test_vsll_slo_vsll_vsc 1 vslo
+ test_vsll_slo_vsll_vuc 1 vslo
+ test_vull_slo_vsll_vsc 1 vslo
+ test_vull_slo_vsll_vuc 1 vslo */
/* { dg-final { scan-assembler-times "vcmpequb" 1 } } */
/* { dg-final { scan-assembler-times "vcmpequh" 1 } } */
/* { dg-final { scan-assembler-times "xvnabsdp" 1 } } */
/* { dg-final { scan-assembler-times "xvnegsp" 1 } } */
/* { dg-final { scan-assembler-times "xvnegdp" 1 } } */
+/* { dg-final { scan-assembler-times "vslo" 4 } } */