* s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
(cfxr, cfdr, cfer, clclu): Add esa flag.
(sqd): Instruction added.
(qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
* s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/esa-g5.d: Adjust according to the s390-opc changes.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z990.d: Likewise.
* gas/s390/esa-z990.s: Likewise.
* gas/s390/zarch-z900.d: Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z990.d: Likewise.
* gas/s390/zarch-z990.s: Likewise.
+2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * gas/s390/esa-g5.d: Adjust according to the s390-opc changes.
+ * gas/s390/esa-g5.s: Likewise.
+ * gas/s390/esa-z990.d: Likewise.
+ * gas/s390/esa-z990.s: Likewise.
+ * gas/s390/zarch-z900.d: Likewise.
+ * gas/s390/zarch-z900.s: Likewise.
+ * gas/s390/zarch-z990.d: Likewise.
+ * gas/s390/zarch-z990.s: Likewise.
+
2008-09-15 Alan Modra <amodra@bigpond.net.au>
* gas/all/gas.exp: Don't run redef tests on a bunch of targets.
.*: b3 99 50 69 [ ]*cfdbr %r6,5,%f9
.*: b3 98 50 69 [ ]*cfebr %r6,5,%f9
.*: b3 9a 50 69 [ ]*cfxbr %r6,5,%f9
+.*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5
+.*: b3 b8 90 65 [ ]*cfer %r6,9,%f5
+.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5
.*: 49 65 af ff [ ]*ch %r6,4095\(%r5,%r10\)
.*: a7 6e 80 01 [ ]*chi %r6,-32767
.*: b2 41 00 69 [ ]*cksm %r6,%r9
.*: b2 21 00 69 [ ]*ipte %r6,%r9
.*: b2 29 00 69 [ ]*iske %r6,%r9
.*: b2 23 00 69 [ ]*ivsk %r6,%r9
-.*: a7 f4 00 00 [ ]*j 268 <foo\+0x268>
-.*: a7 84 00 00 [ ]*je 26c <foo\+0x26c>
-.*: a7 24 00 00 [ ]*jh 270 <foo\+0x270>
-.*: a7 a4 00 00 [ ]*jhe 274 <foo\+0x274>
-.*: a7 44 00 00 [ ]*jl 278 <foo\+0x278>
-.*: a7 c4 00 00 [ ]*jle 27c <foo\+0x27c>
-.*: a7 64 00 00 [ ]*jlh 280 <foo\+0x280>
+.*: a7 f4 00 00 [ ]*j 274 <foo\+0x274>
+.*: a7 84 00 00 [ ]*je 278 <foo\+0x278>
+.*: a7 24 00 00 [ ]*jh 27c <foo\+0x27c>
+.*: a7 a4 00 00 [ ]*jhe 280 <foo\+0x280>
.*: a7 44 00 00 [ ]*jl 284 <foo\+0x284>
-.*: a7 74 00 00 [ ]*jne 288 <foo\+0x288>
-.*: a7 d4 00 00 [ ]*jnh 28c <foo\+0x28c>
-.*: a7 54 00 00 [ ]*jnhe 290 <foo\+0x290>
-.*: a7 b4 00 00 [ ]*jnl 294 <foo\+0x294>
-.*: a7 34 00 00 [ ]*jnle 298 <foo\+0x298>
-.*: a7 94 00 00 [ ]*jnlh 29c <foo\+0x29c>
+.*: a7 c4 00 00 [ ]*jle 288 <foo\+0x288>
+.*: a7 64 00 00 [ ]*jlh 28c <foo\+0x28c>
+.*: a7 44 00 00 [ ]*jl 290 <foo\+0x290>
+.*: a7 74 00 00 [ ]*jne 294 <foo\+0x294>
+.*: a7 d4 00 00 [ ]*jnh 298 <foo\+0x298>
+.*: a7 54 00 00 [ ]*jnhe 29c <foo\+0x29c>
.*: a7 b4 00 00 [ ]*jnl 2a0 <foo\+0x2a0>
-.*: a7 e4 00 00 [ ]*jno 2a4 <foo\+0x2a4>
-.*: a7 d4 00 00 [ ]*jnh 2a8 <foo\+0x2a8>
-.*: a7 74 00 00 [ ]*jne 2ac <foo\+0x2ac>
-.*: a7 14 00 00 [ ]*jo 2b0 <foo\+0x2b0>
-.*: a7 24 00 00 [ ]*jh 2b4 <foo\+0x2b4>
-.*: a7 84 00 00 [ ]*je 2b8 <foo\+0x2b8>
+.*: a7 34 00 00 [ ]*jnle 2a4 <foo\+0x2a4>
+.*: a7 94 00 00 [ ]*jnlh 2a8 <foo\+0x2a8>
+.*: a7 b4 00 00 [ ]*jnl 2ac <foo\+0x2ac>
+.*: a7 e4 00 00 [ ]*jno 2b0 <foo\+0x2b0>
+.*: a7 d4 00 00 [ ]*jnh 2b4 <foo\+0x2b4>
+.*: a7 74 00 00 [ ]*jne 2b8 <foo\+0x2b8>
+.*: a7 14 00 00 [ ]*jo 2bc <foo\+0x2bc>
+.*: a7 24 00 00 [ ]*jh 2c0 <foo\+0x2c0>
+.*: a7 84 00 00 [ ]*je 2c4 <foo\+0x2c4>
.*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\)
.*: b3 18 00 69 [ ]*kdbr %f6,%f9
.*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\)
.*: b3 15 00 69 [ ]*sqdbr %f6,%f9
.*: b2 44 00 69 [ ]*sqdr %f6,%f9
.*: ed 65 af ff 00 34 [ ]*sqe %f6,4095\(%r5,%r10\)
+.*: ed 65 af ff 00 35 [ ]*sqd %f6,4095\(%r5,%r10\)
.*: ed 65 af ff 00 14 [ ]*sqeb %f6,4095\(%r5,%r10\)
.*: b3 14 00 69 [ ]*sqebr %f6,%f9
.*: b2 45 00 69 [ ]*sqer %f6,%f9
.*: ed 65 af ff 00 11 [ ]*tcdb %f6,4095\(%r5,%r10\)
.*: ed 65 af ff 00 10 [ ]*tceb %f6,4095\(%r5,%r10\)
.*: ed 65 af ff 00 12 [ ]*tcxb %f6,4095\(%r5,%r10\)
-.*: b3 58 00 69 [ ]*thder %r6,%r9
-.*: b3 59 00 69 [ ]*thdr %r6,%r9
+.*: b3 58 00 69 [ ]*thder %f6,%f9
+.*: b3 59 00 69 [ ]*thdr %f6,%f9
.*: 91 ff 5f ff [ ]*tm 4095\(%r5\),255
.*: a7 60 ff ff [ ]*tmh %r6,65535
.*: a7 61 ff ff [ ]*tml %r6,65535
.*: 17 69 [ ]*xr %r6,%r9
.*: b2 76 00 00 [ ]*xsch
.*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\)
+.*: 07 07 [ ]*bcr 0,%r7
cfdbr %r6,5,%f9
cfebr %r6,5,%f9
cfxbr %r6,5,%f9
+ cfdr %r6,9,%f5
+ cfer %r6,9,%f5
+ cfxr %r6,9,%f5
ch %r6,4095(%r5,%r10)
chi %r6,-32767
cksm %r6,%r9
sqdbr %f6,%f9
sqdr %f6,%f9
sqe %f6,4095(%r5,%r10)
+ sqd %f6,4095(%r5,%r10)
sqeb %f6,4095(%r5,%r10)
sqebr %f6,%f9
sqer %f6,%f9
tcdb %f6,4095(%r5,%r10)
tceb %f6,4095(%r5,%r10)
tcxb %f6,4095(%r5,%r10)
- thder %r6,%r9
- thdr %r6,%r9
+ thder %f6,%f9
+ thdr %f6,%f9
tm 4095(%r5),255
tmh %r6,65535
tml %r6,65535
.*: b9 3e 00 69 [ ]*kimd %r6,%r9
.*: b9 3f 00 69 [ ]*klmd %r6,%r9
.*: b9 1e 00 69 [ ]*kmac %r6,%r9
+.*: eb 69 50 00 80 8f [ ]*clclu %r6,%r9,-524288\(%r5\)
+.*: 07 07 [ ]*bcr 0,%r7
kimd %r6,%r9
klmd %r6,%r9
kmac %r6,%r9
+ clclu %r6,%r9,-524288(%r5)
.*: eb 96 5f ff 00 3e [ ]*cdsg %r9,%r6,4095\(%r5\)
.*: b3 a4 00 96 [ ]*cegbr %f9,%r6
.*: b3 c4 00 96 [ ]*cegr %f9,%r6
-.*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5
-.*: b3 b8 90 65 [ ]*cfer %r6,9,%f5
-.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5
.*: e3 95 af ff 00 20 [ ]*cg %r9,4095\(%r5,%r10\)
.*: b3 a9 f0 65 [ ]*cgdbr %r6,15,%f5
.*: b3 c9 f0 65 [ ]*cgdr %r6,15,%f5
cdsg %r9,%r6,4095(%r5)
cegbr %f9,%r6
cegr %f9,%r6
- cfdr %r6,9,%f5
- cfer %r6,9,%f5
- cfxr %r6,9,%f5
cg %r9,4095(%r5,%r10)
cgdbr %r6,15,%f5
cgdr %r6,15,%f5
.*: e3 65 a0 00 80 20 [ ]*cg %r6,-524288\(%r5,%r10\)
.*: e3 65 a0 00 80 30 [ ]*cgf %r6,-524288\(%r5,%r10\)
.*: e3 65 a0 00 80 79 [ ]*chy %r6,-524288\(%r5,%r10\)
-.*: eb 69 50 00 80 8f [ ]*clclu %r6,%r9,-524288\(%r5\)
.*: e3 65 a0 00 80 21 [ ]*clg %r6,-524288\(%r5,%r10\)
.*: e3 65 a0 00 80 31 [ ]*clgf %r6,-524288\(%r5,%r10\)
.*: eb ff 50 00 80 55 [ ]*cliy -524288\(%r5\),255
.*: e3 65 a0 00 80 82 [ ]*xg %r6,-524288\(%r5,%r10\)
.*: eb ff 50 00 80 57 [ ]*xiy -524288\(%r5\),255
.*: e3 65 a0 00 80 57 [ ]*xy %r6,-524288\(%r5,%r10\)
-.*: 07 07 [ ]*bcr 0,%r7
cg %r6,-524288(%r5,%r10)
cgf %r6,-524288(%r5,%r10)
chy %r6,-524288(%r5,%r10)
- clclu %r6,%r9,-524288(%r5)
clg %r6,-524288(%r5,%r10)
clgf %r6,-524288(%r5,%r10)
cliy -524288(%r5),255
+2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
+
+ * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
+ (cfxr, cfdr, cfer, clclu): Add esa flag.
+ (sqd): Instruction added.
+ (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
+ * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
+
2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
* z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
#define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } /* e.g. fidtr */
#define INSTR_RRF_0UFF 4, { F_24,F_28,U4_20,0,0,0 } /* e.g. ldetr */
-#define INSTR_RRF_FFFU 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. qadtr */
#define INSTR_RRF_FFRU 4, { F_24,F_16,R_28,U4_20,0,0 } /* e.g. rrdtr */
#define INSTR_RRF_M0RR 4, { R_24,R_28,M_16,0,0,0 } /* e.g. sske */
#define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. clrt */
#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_UUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_0UFF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
-#define MASK_RRF_FFFU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_FFRU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_M0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_U0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
b990 trtt RRE_RR "translate two to two" g5 esa,zarch
ea unpka SS_L0RDRD "unpack ascii" g5 esa,zarch
e2 unpku SS_L0RDRD "unpack unicode" g5 esa,zarch
-b358 thder RRE_RR "convert short bfp to long hfp" g5 esa,zarch
-b359 thdr RRE_RR "convert long bfp to long hfp" g5 esa,zarch
+b358 thder RRE_FF "convert short bfp to long hfp" g5 esa,zarch
+b359 thdr RRE_FF "convert long bfp to long hfp" g5 esa,zarch
b350 tbedr RRF_U0FF "convert long hfp to short bfp" g5 esa,zarch
b351 tbdr RRF_U0FF "convert long hfp to long bfp" g5 esa,zarch
b374 lzer RRE_F0 "load short zero" g5 esa,zarch
b3b6 cxfr RRE_FR "convert from fixed 32 to extended hfp" g5 esa,zarch
b3b5 cdfr RRE_FR "convert from fixed 32 to long hfp" g5 esa,zarch
b3b4 cefr RRE_FR "convert from fixed 32 to short hfp" g5 esa,zarch
-b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" z900 zarch
-b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" z900 zarch
-b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" z900 zarch
+b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" z900 esa,zarch
+b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" z900 esa,zarch
+b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" z900 esa,zarch
b362 ltxr RRE_FF "load and test extended hfp" g5 esa,zarch
b363 lcxr RRE_FF "load complement extended hfp" g5 esa,zarch
b367 fixr RRE_FF "load fp integer extended hfp" g5 esa,zarch
ed0000000037 mee RXE_FRRD "multiply short hfp" g5 esa,zarch
b336 sqxr RRE_FF "square root extended hfp" g5 esa,zarch
ed0000000034 sqe RXE_FRRD "square root short hfp" g5 esa,zarch
+ed0000000035 sqd RXE_FRRD "square root long hfp" g5 esa,zarch
b263 cmpsc RRE_RR "compression call" g5 esa,zarch
eb00000000c0 tp RSL_R0RD "test decimal" g5 esa,zarch
b365 lxr RRE_FF "load extended fp" g5 esa,zarch
eb0000000045 bxleg RSY_RRRD "branch on index low or equal 64" z990 zarch
eb0000000080 icmh RSY_RURD "insert characters under mask high with long offset" z990 zarch
eb000000008e mvclu RSY_RRRD "move long unicode" z990 esa,zarch
-eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990 zarch
+eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990 esa,zarch
eb0000000096 lmh RSY_RRRD "load multiple high" z990 zarch
# new z990 instructions
b98a cspg RRE_RR "compare and swap and purge" z990 zarch
b3dd ldxtr RRF_UUFF "load rounded extended dfp" z9-ec zarch
b3d0 mdtr RRR_F0FF "multiply long dfp" z9-ec zarch
b3d8 mxtr RRR_F0FF "multiply extended dfp" z9-ec zarch
-b3f5 qadtr RRF_FFFU "Quantize long dfp" z9-ec zarch
-b3fd qaxtr RRF_FFFU "Quantize extended dfp" z9-ec zarch
+b3f5 qadtr RRF_FUFF "Quantize long dfp" z9-ec zarch
+b3fd qaxtr RRF_FUFF "Quantize extended dfp" z9-ec zarch
b3f7 rrdtr RRF_FFRU "Reround long dfp" z9-ec zarch
b3ff rrxtr RRF_FFRU "Reround extended dfp" z9-ec zarch
b2b9 srnmt S_RD "set rounding mode dfp" z9-ec zarch