expmed.c (extract_bit_field): Correct condition to use vec_extract patterns also...

        * expmed.c (extract_bit_field): Correct condition to use vec_extract
        patterns also on vector elements other than the first one.
        * config/i386/i386.md (vec_extractv2df, vec_extractv4sf): Add missing
        break statements.

From-SVN: r84316

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1b5656ac2dde85a3599928655d65fc1dec7c89e9..1dd50f9a5e9eba76f5baa7f483fd23d939d93cae 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-07-08  Jan Beulich  <jbeulich@novell.com>
+
+       * expmed.c (extract_bit_field): Correct condition to use vec_extract
+       patterns also on vector elements other than the first one.
+       * config/i386/i386.md (vec_extractv2df, vec_extractv4sf): Add missing
+       break statements.
+
 2004-07-08  Geoffrey Keating  <geoffk@apple.com>
 
        * config/rs6000/darwin-ldouble.c: Correct reference

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 6b037084ebf8bdb4de3f7408ec64e9239331773e..9ad227734f059d71e93d930893c86bc39d1fd720 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4838,6 +4838,7 @@
         emit_insn (gen_sse_shufps (operands[0], operands[0], tmp,
                                    GEN_INT (1 + (0<<2) + (2<<4) + (3<<6))));
       }
+      break;
     case 2:
       {
         rtx op1 = simplify_gen_subreg (V4SFmode, operands[1], SFmode, 0);
@@ -4886,6 +4887,7 @@
         emit_insn (gen_sse_shufps (op0, tmp, tmp,
                                    const1_rtx));
       }
+      break;
     case 2:
       {
        rtx op0 = simplify_gen_subreg (V4SFmode, operands[1], SFmode, 0);
@@ -4894,6 +4896,7 @@
         emit_move_insn (tmp, operands[1]);
         emit_insn (gen_sse_unpckhps (op0, tmp, tmp));
       }
+      break;
     case 3:
       {
        rtx op0 = simplify_gen_subreg (V4SFmode, operands[1], SFmode, 0);
@@ -4903,6 +4906,7 @@
         emit_insn (gen_sse_shufps (op0, tmp, tmp,
                                    GEN_INT (3)));
       }
+      break;
     default:
       abort ();
     }

diff --git a/gcc/expmed.c b/gcc/expmed.c
index ba3c9a6f83b5159c8500f25333610674363bf8c9..fc9ff4764d76663ce8b0aae59d88b8f87bcbee37 100644 (file)
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -329,7 +329,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
 
   value = protect_from_queue (value, 0);
 
-  /* Use vec_extract patterns for extracting parts of vectors whenever
+  /* Use vec_set patterns for inserting parts of vectors whenever
      available.  */
   if (VECTOR_MODE_P (GET_MODE (op0))
       && !MEM_P (op0)
@@ -1102,13 +1102,13 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
       && !MEM_P (op0)
       && (vec_extract_optab->handlers[GET_MODE (op0)].insn_code
          != CODE_FOR_nothing)
-      && ((bitsize + bitnum) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
-         == bitsize / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
+      && ((bitnum + bitsize - 1) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
+         == bitnum / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
     {
       enum machine_mode outermode = GET_MODE (op0);
       enum machine_mode innermode = GET_MODE_INNER (outermode);
       int icode = (int) vec_extract_optab->handlers[outermode].insn_code;
-      int pos = bitnum / GET_MODE_BITSIZE (innermode);
+      unsigned HOST_WIDE_INT pos = bitnum / GET_MODE_BITSIZE (innermode);
       rtx rtxpos = GEN_INT (pos);
       rtx src = op0;
       rtx dest = NULL, pat, seq;