radeonsi: emit TA_CS_BC_BASE_ADDR on SI only if the kernel allows it

Reviewed-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index e59bafeb9b6b5b939ad7e509619e843dca79a7ca..632839ff3a57a4f32d534638f0b7679183aea7b0 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -251,7 +251,12 @@ static void si_initialize_compute(struct si_context *sctx)
                radeon_emit(cs, bc_va >> 8);  /* R_030E00_TA_CS_BC_BASE_ADDR */
                radeon_emit(cs, bc_va >> 40); /* R_030E04_TA_CS_BC_BASE_ADDR_HI */
        } else {
-               radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR, bc_va >> 8);
+               if (sctx->screen->b.info.drm_major == 3 ||
+                   (sctx->screen->b.info.drm_major == 2 &&
+                    sctx->screen->b.info.drm_minor >= 48)) {
+                       radeon_set_config_reg(cs, R_00950C_TA_CS_BC_BASE_ADDR,
+                                             bc_va >> 8);
+               }
        }
 
        sctx->cs_shader_state.emitted_program = NULL;