+2011-02-18 Yao Qi <yao@codesourcery.com>
+
+ * gdb/arm-tdep.c (arm_displaced_step_copy_insn): Move code to ...
+ (arm_process_displaced_insn): .. here. Remove parameter INSN.
+ (thumb_process_displaced_insn): New.
+ * gdb/arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Update
+ call to arm_process_displaced_insn.
+ * gdb/arm-tdep.h : Update declaration of arm_process_displaced_insn.
+
2011-02-17 Tom Tromey <tromey@redhat.com>
* dwarf2loc.h (dwarf2_compile_expr_to_ax): Declare.
}
else
{
- enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
- uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order);
-
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
- "at %.8lx\n", (unsigned long) insn,
- (unsigned long) from);
-
/* Override the default handling of SVC instructions. */
dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
- arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc);
+ arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
}
arm_displaced_init_closure (gdbarch, from, to, dsc);
return copy_undef (gdbarch, insn, dsc); /* Possibly unreachable. */
}
+static void
+thumb_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ error (_("Displaced stepping is only supported in ARM mode"));
+}
+
void
-arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn,
- CORE_ADDR from, CORE_ADDR to,
- struct regcache *regs,
+arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
struct displaced_step_closure *dsc)
{
int err = 0;
-
- if (!displaced_in_arm_mode (regs))
- error (_("Displaced stepping is only supported in ARM mode"));
+ enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
+ uint32_t insn;
/* Most displaced instructions use a 1-instruction scratch space, so set this
here and override below if/when necessary. */
dsc->cleanup = NULL;
dsc->wrote_to_pc = 0;
+ if (!displaced_in_arm_mode (regs))
+ return thumb_process_displaced_insn (gdbarch, from, to, regs, dsc);
+
+ insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
+ "at %.8lx\n", (unsigned long) insn,
+ (unsigned long) from);
+
if ((insn & 0xf0000000) == 0xf0000000)
err = decode_unconditional (gdbarch, insn, regs, dsc);
else switch (((insn & 0x10) >> 4) | ((insn & 0xe000000) >> 24))
{
struct displaced_step_closure *dsc
= xmalloc (sizeof (struct displaced_step_closure));
- enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
- uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
-
- if (debug_displaced)
- fprintf_unfiltered (gdb_stdlog, "displaced: stepping insn %.8lx "
- "at %.8lx\n", (unsigned long) insn,
- (unsigned long) from);
-
- arm_process_displaced_insn (gdbarch, insn, from, to, regs, dsc);
+ arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
arm_displaced_init_closure (gdbarch, from, to, dsc);
return dsc;
};
extern void
- arm_process_displaced_insn (struct gdbarch *gdbarch, uint32_t insn,
- CORE_ADDR from, CORE_ADDR to,
- struct regcache *regs,
+ arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
struct displaced_step_closure *dsc);
extern void
arm_displaced_init_closure (struct gdbarch *gdbarch, CORE_ADDR from,